repos/blastem: blastem.c annotate

annotate blastem.c @ 667:30ccf56842d6

All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working

author	Michael Pavone <pavone@retrodev.com>
date	Sat, 03 Jan 2015 16:08:23 -0800
parents	01c51f397db2
children	5439ae7946ca

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	2 Copyright 2013 Michael Pavone
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	5 */
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "68kinst.h"
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	7 #include "m68k_core.h"
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	8 #include "z80_to_x86.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include "mem.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	10 #include "vdp.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	11 #include "render.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	12 #include "blastem.h"
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	13 #include "gdb_remote.h"
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	14 #include "gst.h"
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	15 #include "util.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	16 #include <stdio.h>
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 #include <stdlib.h>
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	18 #include <string.h>
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	19
531 46a60bb5f785 Update version number Mike Pavone <pavone@retrodev.com> parents: 529 diff changeset	20 #define BLASTEM_VERSION "0.2.0"
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	21
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	22 #define MCLKS_NTSC 53693175
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	23 #define MCLKS_PAL 53203395
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	24
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	25 #define MCLKS_PER_68K 7
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	26 #define MCLKS_PER_YM MCLKS_PER_68K
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	27 #define MCLKS_PER_Z80 15
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	28 #define MCLKS_PER_PSG (MCLKS_PER_Z80*16)
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	29
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	30 //TODO: Figure out the exact value for this
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	31 #define LINES_NTSC 262
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	32 #define LINES_PAL 312
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	33
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	34 #define MAX_SOUND_CYCLES 100000
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	35
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	36 uint32_t mclk_target = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	37
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	38 uint16_t cart[CARTRIDGE_WORDS];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	39 uint16_t ram[RAM_WORDS];
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	40 uint8_t z80_ram[Z80_RAM_BYTES];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	41
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	42 int headless = 0;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	43 int exit_after = 0;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	44 int z80_enabled = 1;
356 79e4b466e7d0 Get rid of debug puts and limit based on audio rather than frame rate by default. Mike Pavone <pavone@retrodev.com> parents: 354 diff changeset	45 int frame_limit = 0;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	46
430 7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	47 tern_node * config;
7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	48
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	49 #ifndef MIN
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	50 #define MIN(a,b) ((a) < (b) ? (a) : (b))
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	51 #endif
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	52
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	53 #define SMD_HEADER_SIZE 512
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	54 #define SMD_MAGIC1 0x03
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	55 #define SMD_MAGIC2 0xAA
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	56 #define SMD_MAGIC3 0xBB
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	57 #define SMD_BLOCK_SIZE 0x4000
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	58
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	59 int load_smd_rom(long filesize, FILE * f)
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	60 {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	61 uint8_t block[SMD_BLOCK_SIZE];
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	62 filesize -= SMD_HEADER_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	63 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	64
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	65 uint16_t * dst = cart;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	66 while (filesize > 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	67 fread(block, 1, SMD_BLOCK_SIZE, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	68 for (uint8_t low = block, high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	69 (dst++) = high << 8 \| *low;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	70 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	71 filesize -= SMD_BLOCK_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	72 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	73 return 1;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	74 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	75
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	76 int load_rom(char * filename)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	77 {
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	78 uint8_t header[10];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	79 FILE * f = fopen(filename, "rb");
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	80 if (!f) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	81 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	82 }
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	83 fread(header, 1, sizeof(header), f);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	84 fseek(f, 0, SEEK_END);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	85 long filesize = ftell(f);
158 a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	86 if (filesize/2 > CARTRIDGE_WORDS) {
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	87 //carts bigger than 4MB not currently supported
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	88 filesize = CARTRIDGE_WORDS*2;
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	89 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	90 fseek(f, 0, SEEK_SET);
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	91 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	92 int i;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	93 for (i = 3; i < 8; i++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	94 if (header[i] != 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	95 break;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	96 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	97 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	98 if (i == 8) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	99 if (header[2]) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	100 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	101 exit(1);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	102 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	103 return load_smd_rom(filesize, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	104 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	105 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	106 fread(cart, 2, filesize/2, f);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	107 fclose(f);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	108 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	109 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	110 cur = (cur >> 8) \| (*cur << 8);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	111 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	112 //TODO: Mirror ROM
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	113 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	114 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	115
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	116 uint16_t read_dma_value(uint32_t address)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	117 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	118 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	119 if (address < 0x200000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	120 return cart[address];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	121 } else if(address >= 0x700000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	122 return ram[address & 0x7FFF];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	123 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	124 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	125 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	126 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	127
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	128 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	129 {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	130 context->int_cycle = CYCLE_NEVER;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	131 if ((context->status & 0x7) < 6) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	132 uint32_t next_vint = vdp_next_vint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	133 if (next_vint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	134 context->int_cycle = next_vint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	135 context->int_num = 6;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	136 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	137 if ((context->status & 0x7) < 4) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	138 uint32_t next_hint = vdp_next_hint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	139 if (next_hint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	140 if (next_hint < context->int_cycle) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	141 context->int_cycle = next_hint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	142 context->int_num = 4;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	143
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	144 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	145 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	146 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	147 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	148
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	149 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	150 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n",
32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	151 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7),
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	152 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	153 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	154
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	155 int break_on_sync = 0;
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	156 int save_state = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	157
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	158 uint8_t reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	159 uint8_t need_reset = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	160 uint8_t busreq = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	161 uint8_t busack = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	162 uint32_t busack_cycle = CYCLE_NEVER;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	163 uint8_t new_busack = 0;
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	164 //#define DO_DEBUG_PRINT
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	165 #ifdef DO_DEBUG_PRINT
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	166 #define dprintf printf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	167 #define dputs puts
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	168 #else
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	169 #define dprintf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	170 #define dputs
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	171 #endif
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	172
402 de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	173 #define Z80_VINT_DURATION 128
de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	174
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	175 void sync_z80(z80_context * z_context, uint32_t mclks)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	176 {
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	177 #ifndef NO_Z80
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	178 if (z80_enabled && !reset && !busreq) {
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	179 genesis_context * gen = z_context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	180 z_context->sync_cycle = mclks;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	181 if (z_context->current_cycle < z_context->sync_cycle) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	182 if (need_reset) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	183 z80_reset(z_context);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	184 need_reset = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	185 }
628 041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	186
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	187 while (z_context->current_cycle < z_context->sync_cycle) {
628 041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	188 if (z_context->int_pulse_end < z_context->current_cycle \|\| z_context->int_pulse_end == CYCLE_NEVER) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	189 z_context->int_pulse_start = vdp_next_vint_z80(gen->vdp);
628 041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	190 z_context->int_pulse_end = z_context->int_pulse_start + Z80_VINT_DURATION;
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	191 }
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	192 if (z_context->iff1) {
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	193 z_context->int_cycle = z_context->int_pulse_start < z_context->int_enable_cycle ? z_context->int_enable_cycle : z_context->int_pulse_start;
602 452ad0b42afa Set int_cycle to CYCLE_NEVER in sync_z80 so that the interrupt routine isn't taken inappropriately now that the kludge in handle_cycle_limit_int has been removed Michael Pavone <pavone@retrodev.com> parents: 593 diff changeset	194 } else {
452ad0b42afa Set int_cycle to CYCLE_NEVER in sync_z80 so that the interrupt routine isn't taken inappropriately now that the kludge in handle_cycle_limit_int has been removed Michael Pavone <pavone@retrodev.com> parents: 593 diff changeset	195 z_context->int_cycle = CYCLE_NEVER;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	196 }
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	197 z_context->target_cycle = z_context->sync_cycle < z_context->int_cycle ? z_context->sync_cycle : z_context->int_cycle;
625 6aa2a8ab9c70 Slight cleanup of vint handling on the Z80 Michael Pavone <pavone@retrodev.com> parents: 623 diff changeset	198 dprintf("Running Z80 from cycle %d to cycle %d. Int cycle: %d\n", z_context->current_cycle, z_context->sync_cycle, z_context->int_cycle);
593 5ef3fe516da9 Z80 core is sort of working again Michael Pavone <pavone@retrodev.com> parents: 592 diff changeset	199 z_context->run(z_context);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	200 dprintf("Z80 ran to cycle %d\n", z_context->current_cycle);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	201 }
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	202 }
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	203 } else
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	204 #endif
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	205 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	206 z_context->current_cycle = mclks;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	207 }
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	208 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	209
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	210 void sync_sound(genesis_context * gen, uint32_t target)
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	211 {
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	212 //printf("YM \| Cycle: %d, bpos: %d, PSG \| Cycle: %d, bpos: %d\n", gen->ym->current_cycle, gen->ym->buffer_pos, gen->psg->cycles, gen->psg->buffer_pos * 2);
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	213 while (target > gen->psg->cycles && target - gen->psg->cycles > MAX_SOUND_CYCLES) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	214 uint32_t cur_target = gen->psg->cycles + MAX_SOUND_CYCLES;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	215 //printf("Running PSG to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	216 psg_run(gen->psg, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	217 //printf("Running YM-2612 to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	218 ym_run(gen->ym, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	219 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	220 psg_run(gen->psg, target);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	221 ym_run(gen->ym, target);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	222
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	223 //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	224 }
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	225
321 146c87616b05 Don't update interrupt mask on non-interrupt exceptions Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	226 uint32_t frame=0;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	227 m68k_context * sync_components(m68k_context * context, uint32_t address)
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	228 {
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	229 //TODO: Handle sync targets smaller than a single frame
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	230 genesis_context * gen = context->system;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	231 vdp_context * v_context = gen->vdp;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	232 z80_context * z_context = gen->z80;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	233 uint32_t mclks = context->current_cycle;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	234 sync_z80(z_context, mclks);
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	235 if (mclks >= mclk_target) {
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	236 sync_sound(gen, mclks);
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	237 gen->ym->current_cycle -= mclk_target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	238 gen->psg->cycles -= mclk_target;
374 d42a8a3e4894 Fix YM2612 busy flag Mike Pavone <pavone@retrodev.com> parents: 372 diff changeset	239 if (gen->ym->write_cycle != CYCLE_NEVER) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	240 gen->ym->write_cycle = gen->ym->write_cycle >= mclk_target ? gen->ym->write_cycle - mclk_target : 0;
374 d42a8a3e4894 Fix YM2612 busy flag Mike Pavone <pavone@retrodev.com> parents: 372 diff changeset	241 }
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	242 //printf("reached frame end \| 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks);
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	243 vdp_run_context(v_context, mclk_target);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	244
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	245 if (!headless) {
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	246 break_on_sync \|= wait_render_frame(v_context, frame_limit);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	247 } else if(exit_after){
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	248 --exit_after;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	249 if (!exit_after) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	250 exit(0);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	251 }
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	252 }
321 146c87616b05 Don't update interrupt mask on non-interrupt exceptions Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	253 frame++;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	254 mclks -= mclk_target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	255 vdp_adjust_cycles(v_context, mclk_target);
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	256 io_adjust_cycles(gen->ports, context->current_cycle, mclk_target);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	257 io_adjust_cycles(gen->ports+1, context->current_cycle, mclk_target);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	258 io_adjust_cycles(gen->ports+2, context->current_cycle, mclk_target);
344 b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	259 if (busack_cycle != CYCLE_NEVER) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	260 if (busack_cycle > mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	261 busack_cycle -= mclk_target;
344 b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	262 } else {
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	263 busack_cycle = CYCLE_NEVER;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	264 busack = new_busack;
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	265 }
b46771135442 Handle busack across frame boundary Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	266 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	267 context->current_cycle -= mclk_target;
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	268 if (z_context->current_cycle >= mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	269 z_context->current_cycle -= mclk_target;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	270 } else {
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	271 z_context->current_cycle = 0;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	272 }
628 041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	273 if (z_context->int_cycle != CYCLE_NEVER) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	274 if (z_context->int_cycle >= mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	275 z_context->int_cycle -= mclk_target;
628 041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	276 } else {
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	277 z_context->int_cycle = 0;
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	278 }
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	279 }
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	280 if (z_context->int_pulse_start != CYCLE_NEVER) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	281 if (z_context->int_pulse_end >= mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	282 z_context->int_pulse_end -= mclk_target;
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	283 if (z_context->int_pulse_start >= mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	284 z_context->int_pulse_start -= mclk_target;
628 041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	285 } else {
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	286 z_context->int_pulse_start = 0;
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	287 }
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	288 }
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	289 } else {
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	290 z_context->int_pulse_start = CYCLE_NEVER;
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	291 z_context->int_pulse_end = CYCLE_NEVER;
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	292 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	293 if (z_context->int_enable_cycle >= mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	294 z_context->int_enable_cycle -= mclk_target;
628 041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	295 } else {
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	296 z_context->int_enable_cycle = 0;
041578693329 Fix Z80 interrupts Michael Pavone <pavone@retrodev.com> parents: 625 diff changeset	297 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	298 if (mclks) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	299 vdp_run_context(v_context, mclks);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	300 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	301 mclk_target = vdp_cycles_to_frame_end(v_context);
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	302 context->sync_cycle = mclk_target;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	303 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	304 //printf("running VDP for %d cycles\n", mclks - v_context->cycles);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	305 vdp_run_context(v_context, mclks);
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	306 sync_sound(gen, mclks);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	307 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	308 if (context->int_ack) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	309 vdp_int_ack(v_context, context->int_ack);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	310 context->int_ack = 0;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	311 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	312 adjust_int_cycle(context, v_context);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	313 if (address) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	314 if (break_on_sync) {
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	315 break_on_sync = 0;
209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	316 debugger(context, address);
209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	317 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	318 if (save_state) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	319 save_state = 0;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	320 //advance Z80 core to the start of an instruction
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	321 while (!z_context->pc)
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	322 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	323 sync_z80(z_context, z_context->current_cycle + MCLKS_PER_Z80);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	324 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	325 save_gst(gen, "savestate.gst", address);
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	326 }
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	327 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	328 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	329 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	330
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	331 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	332 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	333 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	334 printf("machine freeze due to write to address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	335 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	336 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	337 vdp_port &= 0x1F;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	338 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	339 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	340 vdp_context * v_context = context->video_context;
508 b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	341 genesis_context * gen = context->system;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	342 if (vdp_port < 0x10) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	343 int blocked;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	344 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	345 if (vdp_port < 4) {
508 b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	346 gen->bus_busy = 1;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	347 while (vdp_data_port_write(v_context, value) < 0) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	348 while(v_context->flags & FLAG_DMA_RUN) {
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	349 vdp_run_dma_done(v_context, mclk_target);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	350 if (v_context->cycles >= mclk_target) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	351 context->current_cycle = v_context->cycles;
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	352 if (context->current_cycle < mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	353 context->current_cycle += MCLKS_PER_68K;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	354 }
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	355 sync_components(context, 0);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	356 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	357 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	358 //context->current_cycle = v_context->cycles;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	359 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	360 } else if(vdp_port < 8) {
508 b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	361 gen->bus_busy = 1;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	362 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	363 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	364 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	365 while(v_context->flags & FLAG_DMA_RUN) {
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	366 vdp_run_dma_done(v_context, mclk_target);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	367 if (v_context->cycles >= mclk_target) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	368 context->current_cycle = v_context->cycles;
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	369 if (context->current_cycle < mclk_target) {
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	370 context->current_cycle += MCLKS_PER_68K;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	371 }
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	372 sync_components(context, 0);
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	373 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	374 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	375 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	376 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	377 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	378 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	379 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	380 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	381 } else {
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	382 adjust_int_cycle(context, v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	383 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	384 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	385 printf("Illegal write to HV Counter port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	386 exit(1);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	387 }
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	388 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	389 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	390 context->current_cycle = v_context->cycles;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	391 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	392 } else if (vdp_port < 0x18) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	393 sync_sound(gen, context->current_cycle);
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	394 psg_write(gen->psg, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	395 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	396 //TODO: Implement undocumented test register(s)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	397 }
508 b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	398 if (gen->bus_busy)
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	399 {
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	400 //Lock the Z80 out of the bus until the VDP access is complete
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	401 sync_z80(gen->z80, v_context->cycles);
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	402 gen->bus_busy = 0;
b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	403 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	404 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	405 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	406
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	407 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	408 {
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	409 return vdp_port_write(vdp_port, context, vdp_port < 0x10 ? value \| value << 8 : ((vdp_port & 1) ? value : 0));
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	410 }
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	411
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	412 void * z80_vdp_port_write(uint32_t vdp_port, void * vcontext, uint8_t value)
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	413 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	414 z80_context * context = vcontext;
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	415 genesis_context * gen = context->system;
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	416 vdp_port &= 0xFF;
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	417 if (vdp_port & 0xE0) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	418 printf("machine freeze due to write to Z80 address %X\n", 0x7F00 \| vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	419 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	420 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	421 if (vdp_port < 0x10) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	422 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	423 vdp_run_context(gen->vdp, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	424 if (vdp_port < 4) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	425 vdp_data_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	426 } else if (vdp_port < 8) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	427 vdp_control_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	428 } else {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	429 printf("Illegal write to HV Counter port %X\n", vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	430 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	431 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	432 } else if (vdp_port < 0x18) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	433 sync_sound(gen, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	434 psg_write(gen->psg, value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	435 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	436 vdp_test_port_write(gen->vdp, value);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	437 }
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	438 return context;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	439 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	440
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	441 uint16_t vdp_port_read(uint32_t vdp_port, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	442 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	443 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	444 printf("machine freeze due to read from address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	445 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	446 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	447 vdp_port &= 0x1F;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	448 uint16_t value;
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	449 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	450 vdp_context * v_context = context->video_context;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	451 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	452 if (vdp_port < 0x10) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	453 if (vdp_port < 4) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	454 value = vdp_data_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	455 } else if(vdp_port < 8) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	456 value = vdp_control_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	457 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	458 value = vdp_hv_counter_read(v_context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	459 //printf("HV Counter: %X at cycle %d\n", value, v_context->cycles);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	460 }
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	461 } else if (vdp_port < 0x18){
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	462 printf("Illegal read from PSG port %X\n", vdp_port);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	463 exit(1);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	464 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	465 value = vdp_test_port_read(v_context);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	466 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	467 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	468 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	469 context->current_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	470 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	471 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	472 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	473
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	474 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	475 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	476 uint16_t value = vdp_port_read(vdp_port, context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	477 if (vdp_port & 1) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	478 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	479 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	480 return value >> 8;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	481 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	482 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	483
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	484 uint8_t z80_vdp_port_read(uint32_t vdp_port, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	485 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	486 z80_context * context = vcontext;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	487 if (vdp_port & 0xE0) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	488 printf("machine freeze due to read from Z80 address %X\n", 0x7F00 \| vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	489 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	490 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	491 genesis_context * gen = context->system;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	492 vdp_port &= 0x1F;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	493 uint16_t ret;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	494 if (vdp_port < 0x10) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	495 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	496 vdp_run_context(gen->vdp, context->current_cycle);
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	497 if (vdp_port < 4) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	498 ret = vdp_data_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	499 } else if (vdp_port < 8) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	500 ret = vdp_control_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	501 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	502 printf("Illegal write to HV Counter port %X\n", vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	503 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	504 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	505 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	506 //TODO: Figure out the correct value today
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	507 ret = 0xFFFF;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	508 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	509 return vdp_port & 1 ? ret : ret >> 8;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	510 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	511
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	512 uint32_t zram_counter = 0;
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	513 #define Z80_ACK_DELAY 3
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	514 #define Z80_BUSY_DELAY 1//TODO: Find the actual value for this
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	515 #define Z80_REQ_BUSY 1
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	516 #define Z80_REQ_ACK 0
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	517 #define Z80_RES_BUSACK reset
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	518
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	519 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	520 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	521 genesis_context * gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	522 if (location < 0x10000) {
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	523 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	524 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	525 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	526 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	527 if (!(busack \|\| reset)) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	528 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	529 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	530 z80_ram[location & 0x1FFF] = value;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	531 #ifndef NO_Z80
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	532 z80_handle_code_write(location & 0x1FFF, gen->z80);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	533 #endif
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	534 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	535 sync_sound(gen, context->current_cycle);
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	536 if (location & 1) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	537 ym_data_write(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	538 } else if(location & 2) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	539 ym_address_write_part2(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	540 } else {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	541 ym_address_write_part1(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	542 }
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	543 } else if (location == 0x6000) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	544 gen->z80->bank_reg = (gen->z80->bank_reg >> 1 \| value << 8) & 0x1FF;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	545 if (gen->z80->bank_reg < 0x80) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	546 gen->z80->mem_pointers[1] = (gen->z80->bank_reg << 15) + ((char *)gen->z80->mem_pointers[2]);
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	547 } else {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	548 gen->z80->mem_pointers[1] = NULL;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	549 }
395 0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	550 } else {
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	551 printf("68K write to unhandled Z80 address %X\n", location);
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	552 exit(1);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	553 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	554 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	555 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	556 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	557 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	558 switch(location/2)
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	559 {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	560 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	561 io_data_write(gen->ports, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	562 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	563 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	564 io_data_write(gen->ports+1, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	565 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	566 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	567 io_data_write(gen->ports+2, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	568 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	569 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	570 gen->ports[0].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	571 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	572 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	573 gen->ports[1].control = value;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	574 break;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	575 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	576 gen->ports[2].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	577 break;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	578 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	579 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	580 if (location == 0x1100) {
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	581 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	582 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	583 busack_cycle = CYCLE_NEVER;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	584 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	585 if (value & 1) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	586 dputs("bus requesting Z80");
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	587
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	588 if(!reset && !busreq) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	589 sync_z80(gen->z80, context->current_cycle + Z80_ACK_DELAY*MCLKS_PER_Z80);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	590 busack_cycle = gen->z80->current_cycle;//context->current_cycle + Z80_ACK_DELAY;
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	591 new_busack = Z80_REQ_ACK;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	592 }
364 62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request Mike Pavone <pavone@retrodev.com> parents: 362 diff changeset	593 busreq = 1;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	594 } else {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	595 sync_z80(gen->z80, context->current_cycle);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	596 if (busreq) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	597 dputs("releasing z80 bus");
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	598 #ifdef DO_DEBUG_PRINT
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	599 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	600 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	601 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	602 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	603 fclose(f);
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	604 #endif
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	605 busack_cycle = gen->z80->current_cycle + Z80_BUSY_DELAY;
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	606 new_busack = Z80_REQ_BUSY;
87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	607 busreq = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	608 }
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	609 //busack_cycle = CYCLE_NEVER;
1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	610 //busack = Z80_REQ_BUSY;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	611
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	612 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	613 } else if (location == 0x1200) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	614 sync_z80(gen->z80, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	615 if (value & 1) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	616 if (reset && busreq) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	617 new_busack = 0;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	618 busack_cycle = gen->z80->current_cycle + Z80_ACK_DELAY;//context->current_cycle + Z80_ACK_DELAY;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	619 }
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	620 //TODO: Deal with the scenario in which reset is not asserted long enough
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	621 if (reset) {
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	622 need_reset = 1;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	623 //TODO: Add necessary delay between release of reset and start of execution
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	624 gen->z80->current_cycle = context->current_cycle + 16 * MCLKS_PER_Z80;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	625 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	626 reset = 0;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	627 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	628 reset = 1;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	629 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	630 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	631 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	632 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	633 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	634 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	635
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	636 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	637 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	638 if (location < 0x10000 \|\| (location & 0x1FFF) >= 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	639 return io_write(location, context, value >> 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	640 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	641 return io_write(location, context, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	642 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	643 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	644
130 0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	645 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	646 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	647 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	648 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	649 uint8_t version_reg = NO_DISK \| USA;
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	650
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	651 uint8_t io_read(uint32_t location, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	652 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	653 uint8_t value;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	654 genesis_context *gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	655 if (location < 0x10000) {
336 87b65e5ce1ab Fix a stupid bug in z80 busreq acknowledge delay code and make some small improvements there too Mike Pavone <pavone@retrodev.com> parents: 335 diff changeset	656 if (busack_cycle <= context->current_cycle) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	657 busack = new_busack;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	658 busack_cycle = CYCLE_NEVER;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	659 }
289 1cc0850ab6bc Hopefully more correct implementation of the Z80 busack status Mike Pavone <pavone@retrodev.com> parents: 288 diff changeset	660 if (!(busack==Z80_REQ_BUSY \|\| reset)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	661 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	662 if (location < 0x4000) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	663 value = z80_ram[location & 0x1FFF];
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	664 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	665 sync_sound(gen, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	666 value = ym_read_status(gen->ym);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	667 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	668 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	669 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	670 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	671 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	672 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	673 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	674 location &= 0x1FFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	675 if (location < 0x100) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	676 switch(location/2)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	677 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	678 case 0x0:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	679 //version bits should be 0 for now since we're not emulating TMSS
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	680 value = version_reg;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	681 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	682 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	683 value = io_data_read(gen->ports, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	684 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	685 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	686 value = io_data_read(gen->ports+1, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	687 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	688 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	689 value = io_data_read(gen->ports+2, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	690 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	691 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	692 value = gen->ports[0].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	693 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	694 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	695 value = gen->ports[1].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	696 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	697 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	698 value = gen->ports[2].control;
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	699 break;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	700 default:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	701 value = 0xFF;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	702 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	703 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	704 if (location == 0x1100) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	705 if (busack_cycle <= context->current_cycle) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	706 busack = new_busack;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	707 busack_cycle = CYCLE_NEVER;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	708 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	709 value = Z80_RES_BUSACK \|\| busack;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	710 dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d, busack_cycle %d)\n", value, context->current_cycle, reset, busack, busack_cycle);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	711 } else if (location == 0x1200) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	712 value = !reset;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	713 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	714 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	715 printf("Byte read of unknown IO location: %X\n", location);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	716 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	717 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	718 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	719 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	720 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	721
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	722 uint16_t io_read_w(uint32_t location, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	723 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	724 uint16_t value = io_read(location, context);
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	725 if (location < 0x10000 \|\| (location & 0x1FFF) < 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	726 value = value \| (value << 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	727 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	728 value <<= 8;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	729 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	730 return value;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	731 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	732
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	733 void * z80_write_ym(uint32_t location, void * vcontext, uint8_t value)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	734 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	735 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	736 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	737 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	738 if (location & 1) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	739 ym_data_write(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	740 } else if (location & 2) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	741 ym_address_write_part2(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	742 } else {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	743 ym_address_write_part1(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	744 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	745 return context;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	746 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	747
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	748 uint8_t z80_read_ym(uint32_t location, void * vcontext)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	749 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	750 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	751 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	752 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	753 return ym_read_status(gen->ym);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	754 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	755
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	756 uint8_t z80_read_bank(uint32_t location, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	757 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	758 z80_context * context = vcontext;
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	759 //typical delay from bus arbitration
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	760 context->current_cycle += 3;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	761
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	762 location &= 0x7FFF;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	763 //TODO: add cycle for an access right after a previous one
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	764 //TODO: block Z80 if VDP has the bus or the 68K is blocked on a VDP access
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	765 if (context->mem_pointers[1]) {
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	766 return context->mem_pointers[1][location ^ 1];
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	767 }
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	768 uint32_t address = context->bank_reg << 15 \| location;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	769 if (address >= 0xC00000 && address < 0xE00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	770 return z80_vdp_port_read(location & 0xFF, context);
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	771 } else {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	772 fprintf(stderr, "Unhandled read by Z80 from address %X through banked memory area (%X)\n", address, context->bank_reg << 15);
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	773 }
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	774 return 0;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	775 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	776
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	777 void z80_write_bank(uint32_t location, void vcontext, uint8_t value)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	778 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	779 z80_context * context = vcontext;
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	780 //typical delay from bus arbitration
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	781 context->current_cycle += 3;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	782 location &= 0x7FFF;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	783 //TODO: add cycle for an access right after a previous one
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	784 //TODO: block Z80 if VDP has the bus or the 68K is blocked on a VDP access
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	785 uint32_t address = context->bank_reg << 15 \| location;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	786 if (address >= 0xE00000) {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	787 address &= 0xFFFF;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	788 ((uint8_t *)ram)[address ^ 1] = value;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	789 } else if (address >= 0xC00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	790 z80_vdp_port_write(location & 0xFF, context, value);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	791 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	792 fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address);
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	793 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	794 return context;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	795 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	796
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	797 void z80_write_bank_reg(uint32_t location, void vcontext, uint8_t value)
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	798 {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	799 z80_context * context = vcontext;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	800
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	801 context->bank_reg = (context->bank_reg >> 1 \| value << 8) & 0x1FF;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	802 if (context->bank_reg < 0x80) {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	803 genesis_context *gen = context->system;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	804 context->mem_pointers[1] = get_native_pointer(context->bank_reg << 15, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	805 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	806 context->mem_pointers[1] = NULL;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	807 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	808
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	809 return context;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	810 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	811
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	812 uint16_t read_sram_w(uint32_t address, m68k_context * context)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	813 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	814 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	815 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	816 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	817 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	818 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	819 return gen->save_ram[address] << 8 \| gen->save_ram[address+1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	820 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	821 return gen->save_ram[address >> 1] << 8 \| 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	822 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	823 return gen->save_ram[address >> 1] \| 0xFF00;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	824 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	825 return 0xFFFF;//We should never get here
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	826 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	827
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	828 uint8_t read_sram_b(uint32_t address, m68k_context * context)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	829 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	830 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	831 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	832 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	833 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	834 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	835 return gen->save_ram[address];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	836 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	837 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	838 return 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	839 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	840 return gen->save_ram[address >> 1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	841 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	842 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	843 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	844 return gen->save_ram[address >> 1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	845 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	846 return 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	847 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	848 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	849 return 0xFF;//We should never get here
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	850 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	851
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	852 m68k_context * write_sram_area_w(uint32_t address, m68k_context * context, uint16_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	853 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	854 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	855 if ((gen->bank_regs[0] & 0x3) == 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	856 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	857 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	858 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	859 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	860 gen->save_ram[address] = value >> 8;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	861 gen->save_ram[address+1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	862 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	863 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	864 gen->save_ram[address >> 1] = value >> 8;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	865 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	866 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	867 gen->save_ram[address >> 1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	868 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	869 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	870 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	871 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	872 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	873
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	874 m68k_context * write_sram_area_b(uint32_t address, m68k_context * context, uint8_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	875 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	876 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	877 if ((gen->bank_regs[0] & 0x3) == 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	878 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	879 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	880 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	881 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	882 gen->save_ram[address] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	883 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	884 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	885 if (!(address & 1)) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	886 gen->save_ram[address >> 1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	887 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	888 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	889 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	890 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	891 gen->save_ram[address >> 1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	892 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	893 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	894 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	895 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	896 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	897 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	898
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	899 m68k_context * write_bank_reg_w(uint32_t address, m68k_context * context, uint16_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	900 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	901 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	902 address &= 0xE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	903 address >>= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	904 gen->bank_regs[address] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	905 if (!address) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	906 if (value & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	907 context->mem_pointers[2] = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	908 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	909 context->mem_pointers[2] = cart + 0x200000/2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	910 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	911 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	912 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	913 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	914
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	915 m68k_context * write_bank_reg_b(uint32_t address, m68k_context * context, uint8_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	916 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	917 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	918 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	919 address &= 0xE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	920 address >>= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	921 gen->bank_regs[address] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	922 if (!address) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	923 if (value & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	924 context->mem_pointers[2] = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	925 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	926 context->mem_pointers[2] = cart + 0x200000/2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	927 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	928 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	929 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	930 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	931 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	932
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	933 void set_speed_percent(genesis_context * context, uint32_t percent)
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	934 {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	935 uint32_t old_clock = context->master_clock;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	936 context->master_clock = ((uint64_t)context->normal_clock * (uint64_t)percent) / 100;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	937 while (context->ym->current_cycle != context->psg->cycles) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	938 sync_sound(context, context->psg->cycles + MCLKS_PER_PSG);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	939 }
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	940 ym_adjust_master_clock(context->ym, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	941 psg_adjust_master_clock(context->psg, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	942 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	943
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	944 #define ROM_END 0x1A4
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	945 #define RAM_ID 0x1B0
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	946 #define RAM_FLAGS 0x1B2
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	947 #define RAM_START 0x1B4
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	948 #define RAM_END 0x1B8
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	949 #define MAX_MAP_CHUNKS (4+7+1)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	950 #define RAM_FLAG_MASK 0x1800
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	951
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	952 const memmap_chunk static_map[] = {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	953 {0, 0x400000, 0xFFFFFF, 0, MMAP_READ, cart,
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	954 NULL, NULL, NULL, NULL},
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	955 {0xE00000, 0x1000000, 0xFFFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, ram,
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	956 NULL, NULL, NULL, NULL},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	957 {0xC00000, 0xE00000, 0x1FFFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	958 (read_16_fun)vdp_port_read, (write_16_fun)vdp_port_write,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	959 (read_8_fun)vdp_port_read_b, (write_8_fun)vdp_port_write_b},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	960 {0xA00000, 0xA12000, 0x1FFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	961 (read_16_fun)io_read_w, (write_16_fun)io_write_w,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	962 (read_8_fun)io_read, (write_8_fun)io_write}
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	963 };
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	964
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	965 char * sram_filename;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	966 genesis_context * genesis;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	967 void save_sram()
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	968 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	969 FILE * f = fopen(sram_filename, "wb");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	970 if (!f) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	971 fprintf(stderr, "Failed to open SRAM file %s for writing\n", sram_filename);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	972 return;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	973 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	974 uint32_t size = genesis->save_ram_mask+1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	975 if (genesis->save_flags != RAM_FLAG_BOTH) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	976 size/= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	977 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	978 fwrite(genesis->save_ram, 1, size, f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	979 fclose(f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	980 printf("Saved SRAM to %s\n", sram_filename);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	981 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	982
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	983 void init_run_cpu(genesis_context * gen, FILE * address_log, char * statefile, uint8_t * debugger)
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	984 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	985 m68k_context context;
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	986 m68k_options opts;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	987 gen->m68k = &context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	988 memmap_chunk memmap[MAX_MAP_CHUNKS];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	989 uint32_t num_chunks;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	990 void * initial_mapped = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	991 gen->save_ram = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	992 //TODO: Handle carts larger than 4MB
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	993 //TODO: Handle non-standard mappers
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	994 uint32_t size;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	995 if ((cart[RAM_ID/2] & 0xFF) == 'A' && (cart[RAM_ID/2] >> 8) == 'R') {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	996 //Cart has save RAM
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	997 uint32_t rom_end = ((cart[ROM_END/2] << 16) \| cart[ROM_END/2+1]) + 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	998 uint32_t ram_start = (cart[RAM_START/2] << 16) \| cart[RAM_START/2+1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	999 uint32_t ram_end = (cart[RAM_END/2] << 16) \| cart[RAM_END/2+1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1000 uint16_t ram_flags = cart[RAM_FLAGS/2];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1001 gen->save_flags = ram_flags & RAM_FLAG_MASK;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1002 memset(memmap, 0, sizeof(memmap_chunk)*2);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1003 if (ram_start >= rom_end) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1004 memmap[0].end = rom_end;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1005 memmap[0].mask = 0xFFFFFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1006 memmap[0].flags = MMAP_READ;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1007 memmap[0].buffer = cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1008
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1009 ram_start &= 0xFFFFFE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1010 ram_end \|= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1011 memmap[1].start = ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1012 gen->save_ram_mask = memmap[1].mask = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1013 ram_end += 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1014 memmap[1].end = ram_end;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1015 memmap[1].flags = MMAP_READ \| MMAP_WRITE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1016 size = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1017 if ((ram_flags & RAM_FLAG_MASK) == RAM_FLAG_ODD) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1018 memmap[1].flags \|= MMAP_ONLY_ODD;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1019 size /= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1020 } else if((ram_flags & RAM_FLAG_MASK) == RAM_FLAG_EVEN) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1021 memmap[1].flags \|= MMAP_ONLY_EVEN;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1022 size /= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1023 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1024 memmap[1].buffer = gen->save_ram = malloc(size);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1025
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1026 memcpy(memmap+2, static_map+1, sizeof(static_map)-sizeof(static_map[0]));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1027 num_chunks = sizeof(static_map)/sizeof(memmap_chunk)+1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1028 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1029 //Assume the standard Sega mapper for now
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1030 memmap[0].end = 0x200000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1031 memmap[0].mask = 0xFFFFFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1032 memmap[0].flags = MMAP_READ;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1033 memmap[0].buffer = cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1034
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1035 memmap[1].start = 0x200000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1036 memmap[1].end = 0x400000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1037 memmap[1].mask = 0x1FFFFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1038 ram_start &= 0xFFFFFE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1039 ram_end \|= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1040 gen->save_ram_mask = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1041 memmap[1].flags = MMAP_READ \| MMAP_PTR_IDX \| MMAP_FUNC_NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1042 memmap[1].ptr_index = 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1043 memmap[1].read_16 = (read_16_fun)read_sram_w;//these will only be called when mem_pointers[2] == NULL
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1044 memmap[1].read_8 = (read_8_fun)read_sram_b;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1045 memmap[1].write_16 = (write_16_fun)write_sram_area_w;//these will be called all writes to the area
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1046 memmap[1].write_8 = (write_8_fun)write_sram_area_b;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1047 memcpy(memmap+2, static_map+1, sizeof(static_map)-sizeof(static_map[0]));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1048 num_chunks = sizeof(static_map)/sizeof(memmap_chunk)+1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1049 memset(memmap+num_chunks, 0, sizeof(memmap[num_chunks]));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1050 memmap[num_chunks].start = 0xA13000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1051 memmap[num_chunks].end = 0xA13100;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1052 memmap[num_chunks].mask = 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1053 memmap[num_chunks].write_16 = (write_16_fun)write_bank_reg_w;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1054 memmap[num_chunks].write_8 = (write_8_fun)write_bank_reg_b;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1055 num_chunks++;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1056 ram_end++;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1057 size = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1058 if ((ram_flags & RAM_FLAG_MASK) != RAM_FLAG_BOTH) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1059 size /= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1060 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1061 gen->save_ram = malloc(size);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1062 memmap[1].buffer = initial_mapped = cart + 0x200000/2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1063 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1064 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1065 memcpy(memmap, static_map, sizeof(static_map));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1066 num_chunks = sizeof(static_map)/sizeof(memmap_chunk);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1067 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1068 if (gen->save_ram) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1069 memset(gen->save_ram, 0, size);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1070 FILE * f = fopen(sram_filename, "rb");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1071 if (f) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1072 uint32_t read = fread(gen->save_ram, 1, size, f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1073 fclose(f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1074 if (read > 0) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1075 printf("Loaded SRAM from %s\n", sram_filename);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1076 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1077 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1078 atexit(save_sram);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1079 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1080 init_m68k_opts(&opts, memmap, num_chunks, MCLKS_PER_68K);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1081 opts.address_log = address_log;
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 548 diff changeset	1082 init_68k_context(&context, opts.gen.native_code_map, &opts);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1083
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1084 context.video_context = gen->vdp;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1085 context.system = gen;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1086 //cartridge ROM
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1087 context.mem_pointers[0] = cart;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1088 context.target_cycle = context.sync_cycle = mclk_target;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1089 //work RAM
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1090 context.mem_pointers[1] = ram;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1091 //save RAM/map
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1092 context.mem_pointers[2] = initial_mapped;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1093 context.mem_pointers[3] = (uint16_t *)gen->save_ram;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1094 uint32_t address;
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1095 address = cart[2] << 16 \| cart[3];
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1096 translate_m68k_stream(address, &context);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1097 if (statefile) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1098 uint32_t pc = load_gst(gen, statefile);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1099 if (!pc) {
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1100 fprintf(stderr, "Failed to load save state %s\n", statefile);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1101 exit(1);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1102 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1103 printf("Loaded %s\n", statefile);
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1104 if (debugger) {
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1105 insert_breakpoint(&context, pc, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1106 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1107 adjust_int_cycle(gen->m68k, gen->vdp);
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1108 #ifndef NO_Z80
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1109 gen->z80->native_pc = z80_get_native_address_trans(gen->z80, gen->z80->pc);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1110 #endif
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1111 start_68k_context(&context, pc);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1112 } else {
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1113 if (debugger) {
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1114 insert_breakpoint(&context, address, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1115 }
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1116 m68k_reset(&context);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1117 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1118 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1119
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1120 char title[64];
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1121
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1122 #define TITLE_START 0x150
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1123 #define TITLE_END (TITLE_START+48)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1124
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1125 void update_title()
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1126 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1127 uint16_t *last = cart + TITLE_END/2 - 1;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1128 while(last > cart + TITLE_START/2 && *last == 0x2020)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1129 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1130 last--;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1131 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1132 uint16_t *start = cart + TITLE_START/2;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1133 char *cur = title;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1134 char last_char = ' ';
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1135 for (; start != last; start++)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1136 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1137 if ((last_char != ' ' \|\| (start >> 8) != ' ') && (start >> 8) < 0x80) {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1138 (cur++) = start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1139 last_char = *start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1140 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1141 if (last_char != ' ' \|\| (start & 0xFF) != ' ' && (start & 0xFF) < 0x80) {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1142 (cur++) = start;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1143 last_char = *start & 0xFF;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1144 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1145 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1146 (cur++) = start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1147 if ((*start & 0xFF) != ' ') {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1148 (cur++) = start;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1149 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1150 strcpy(cur, " - BlastEm");
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1151 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1152
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1153 #define REGION_START 0x1F0
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1154
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1155 int detect_specific_region(char region)
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1156 {
346 aff29d50afd5 Fix a region detection bug Mike Pavone <pavone@retrodev.com> parents: 345 diff changeset	1157 return (cart[REGION_START/2] & 0xFF) == region \|\| (cart[REGION_START/2] >> 8) == region \|\| (cart[REGION_START/2+1] & 0xFF) == region;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1158 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1159
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1160 void detect_region()
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1161 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1162 if (detect_specific_region('U')\|\| detect_specific_region('B') \|\| detect_specific_region('4')) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1163 version_reg = NO_DISK \| USA;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1164 } else if (detect_specific_region('J')) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1165 version_reg = NO_DISK \| JAP;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1166 } else if (detect_specific_region('E') \|\| detect_specific_region('A')) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1167 version_reg = NO_DISK \| EUR;
434 f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1168 } else {
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1169 char * def_region = tern_find_ptr(config, "default_region");
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1170 if (def_region) {
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1171 switch(*def_region)
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1172 {
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1173 case 'j':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1174 case 'J':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1175 version_reg = NO_DISK \| JAP;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1176 break;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1177 case 'u':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1178 case 'U':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1179 version_reg = NO_DISK \| USA;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1180 break;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1181 case 'e':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1182 case 'E':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1183 version_reg = NO_DISK \| EUR;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1184 break;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1185 }
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1186 }
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1187 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1188 }
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1189 #ifndef NO_Z80
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1190 const memmap_chunk z80_map[] = {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1191 { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL },
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1192 { 0x8000, 0x10000, 0x7FFF, 0, 0, NULL, NULL, NULL, z80_read_bank, z80_write_bank},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1193 { 0x4000, 0x6000, 0x0003, 0, 0, NULL, NULL, NULL, z80_read_ym, z80_write_ym},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1194 { 0x6000, 0x6100, 0xFFFF, 0, 0, NULL, NULL, NULL, NULL, z80_write_bank_reg},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1195 { 0x7F00, 0x8000, 0x00FF, 0, 0, NULL, NULL, NULL, z80_vdp_port_read, z80_vdp_port_write}
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1196 };
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1197 #endif
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1198
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1199 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1200 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1201 if (argc < 2) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1202 fputs("Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n", stderr);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1203 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1204 }
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	1205 set_exe_str(argv[0]);
6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	1206 config = load_config();
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1207 detect_region();
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1208 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1209 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1210 int debug = 0;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1211 int ym_log = 0;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1212 int loaded = 0;
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1213 uint8_t force_version = 0;
5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1214 char * romfname = NULL;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1215 FILE *address_log = NULL;
425 8b3ae850d1c4 Forgot to null initialize the statfile pointer Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	1216 char * statefile = NULL;
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1217 uint8_t * debuggerfun = NULL;
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1218 uint8_t fullscreen = 0, use_gl = 1;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1219 for (int i = 1; i < argc; i++) {
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1220 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1221 switch(argv[i][1]) {
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1222 case 'b':
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1223 i++;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1224 if (i >= argc) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1225 fputs("-b must be followed by a frame count\n", stderr);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1226 return 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1227 }
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1228 headless = 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1229 exit_after = atoi(argv[i]);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1230 break;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1231 case 'd':
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1232 debuggerfun = (uint8_t *)debugger;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1233 break;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1234 case 'D':
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1235 gdb_remote_init();
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1236 debuggerfun = (uint8_t *)gdb_debug_enter;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1237 break;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	1238 case 'f':
444 cc754a309ead Add fullscreen support and add a keybinding for exiting the emulator Mike Pavone <pavone@retrodev.com> parents: 434 diff changeset	1239 fullscreen = 1;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	1240 break;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1241 case 'g':
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1242 use_gl = 0;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1243 break;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1244 case 'l':
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1245 address_log = fopen("address.log", "w");
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1246 break;
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1247 case 'v':
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1248 printf("blastem %s\n", BLASTEM_VERSION);
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1249 return 0;
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1250 break;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1251 case 'n':
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1252 z80_enabled = 0;
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1253 break;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1254 case 'r':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1255 i++;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1256 if (i >= argc) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1257 fputs("-r must be followed by region (J, U or E)\n", stderr);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1258 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1259 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1260 switch (argv[i][0])
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1261 {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1262 case 'j':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1263 case 'J':
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1264 force_version = NO_DISK \| JAP;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1265 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1266 case 'u':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1267 case 'U':
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1268 force_version = NO_DISK \| USA;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1269 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1270 case 'e':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1271 case 'E':
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1272 force_version = NO_DISK \| EUR;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1273 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1274 default:
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1275 fprintf(stderr, "'%c' is not a valid region character for the -r option\n", argv[i][0]);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1276 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1277 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1278 break;
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1279 case 's':
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1280 i++;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1281 if (i >= argc) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1282 fputs("-s must be followed by a savestate filename\n", stderr);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1283 return 1;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1284 }
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1285 statefile = argv[i];
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1286 break;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1287 case 'y':
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1288 ym_log = 1;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1289 break;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1290 case 'h':
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1291 puts(
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1292 "Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1293 "Options:\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1294 " -h Print this help text\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1295 " -r (J\|U\|E) Force region to Japan, US or Europe respectively\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1296 " -f Start in fullscreen mode\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1297 " -g Disable OpenGL rendering\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1298 " -s FILE Load a GST format savestate from FILE\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1299 " -d Enter debugger on startup\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1300 " -n Disable Z80\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1301 " -v Display version number and exit\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1302 " -l Log 68K code addresses (useful for assemblers)\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1303 " -y Log individual YM-2612 channels to WAVE files\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1304 );
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1305 return 0;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1306 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1307 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1308 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1309 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1310 } else if (!loaded) {
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1311 if(!load_rom(argv[i])) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1312 fprintf(stderr, "Failed to open %s for reading\n", argv[i]);
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1313 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1314 }
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1315 romfname = argv[i];
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1316 loaded = 1;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1317 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1318 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1319 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1320 height = atoi(argv[i]);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1321 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1322 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1323 if (!loaded) {
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1324 fputs("You must specify a ROM filename!\n", stderr);
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1325 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1326 }
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1327 if (force_version) {
5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1328 version_reg = force_version;
5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1329 }
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1330 update_title();
433 ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1331 int def_width = 0;
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1332 char *config_width = tern_find_ptr(config, "videowidth");
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1333 if (config_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1334 def_width = atoi(config_width);
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1335 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1336 if (!def_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1337 def_width = 640;
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1338 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1339 width = width < 320 ? def_width : width;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1340 height = height < 240 ? (width/320) * 240 : height;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1341 uint32_t fps = 60;
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1342 if (version_reg & 0x40) {
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1343 fps = 50;
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1344 }
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1345 if (!headless) {
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1346 render_init(width, height, title, fps, fullscreen, use_gl);
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1347 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1348 vdp_context v_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1349 genesis_context gen;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1350 memset(&gen, 0, sizeof(gen));
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1351 gen.master_clock = gen.normal_clock = fps == 60 ? MCLKS_NTSC : MCLKS_PAL;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1352
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1353 init_vdp_context(&v_context, version_reg & 0x40);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1354 mclk_target = vdp_cycles_to_frame_end(&v_context);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1355
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1356 ym2612_context y_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1357 ym_init(&y_context, render_sample_rate(), gen.master_clock, MCLKS_PER_YM, render_audio_buffer(), ym_log ? YM_OPT_WAVE_LOG : 0);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1358
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1359 psg_context p_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1360 psg_init(&p_context, render_sample_rate(), gen.master_clock, MCLKS_PER_PSG, render_audio_buffer());
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1361
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1362 z80_context z_context;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1363 #ifndef NO_Z80
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1364 z80_options z_opts;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1365 init_z80_opts(&z_opts, z80_map, 5, MCLKS_PER_Z80);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1366 init_z80_context(&z_context, &z_opts);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1367 #endif
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1368
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1369 z_context.system = &gen;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1370 z_context.mem_pointers[0] = z80_ram;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1371 z_context.sync_cycle = z_context.target_cycle = mclk_target;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1372 z_context.int_cycle = CYCLE_NEVER;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1373 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1374
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1375 gen.z80 = &z_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1376 gen.vdp = &v_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1377 gen.ym = &y_context;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1378 gen.psg = &p_context;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1379 genesis = &gen;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1380
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1381 int fname_size = strlen(romfname);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1382 sram_filename = malloc(fname_size+6);
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1383 memcpy(sram_filename, romfname, fname_size);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1384 int i;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1385 for (i = fname_size-1; fname_size >= 0; --i) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1386 if (sram_filename[i] == '.') {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1387 strcpy(sram_filename + i + 1, "sram");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1388 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1389 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1390 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1391 if (i < 0) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1392 strcpy(sram_filename + fname_size, ".sram");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1393 }
645 d77c79cec800 Initial support for configurable IO, custom IO and sega transfer board emulation Michael Pavone <pavone@retrodev.com> parents: 628 diff changeset	1394 set_keybindings(gen.ports);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1395
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1396 init_run_cpu(&gen, address_log, statefile, debuggerfun);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1397 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1398 }

Mercurial > repos > blastem

annotate blastem.c @ 667:30ccf56842d6