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annotate ym2612.h @ 1021:4a92889e2889 v0.4.0

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Fix OS X build
author Michael Pavone <pavone@retrodev.com>
date Wed, 04 May 2016 00:50:20 -0700
parents 8d032a368dd5
children 4b893b02444e
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #ifndef YM2612_H_
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7 #define YM2612_H_
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8
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9 #include <stdint.h>
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10 #include <stdio.h>
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11
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12 #define NUM_PART_REGS (0xB7-0x30)
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13 #define NUM_CHANNELS 6
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14 #define NUM_OPERATORS (4*NUM_CHANNELS)
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15
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16 #define YM_OPT_WAVE_LOG 1
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17
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18 typedef struct {
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19 uint32_t phase_counter;
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20 uint16_t envelope;
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21 int16_t output;
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22 uint16_t total_level;
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23 uint16_t sustain_level;
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24 uint8_t rates[4];
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25 uint8_t key_scaling;
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26 uint8_t multiple;
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27 uint8_t detune;
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28 uint8_t am;
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29 uint8_t env_phase;
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30 } ym_operator;
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31
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32 typedef struct {
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33 FILE * logfile;
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34 uint16_t fnum;
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35 int16_t output;
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36 int16_t op1_old;
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37 uint8_t block_fnum_latch;
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38 uint8_t block;
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39 uint8_t keycode;
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40 uint8_t algorithm;
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41 uint8_t feedback;
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42 uint8_t ams;
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43 uint8_t pms;
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44 uint8_t lr;
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45 } ym_channel;
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46
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47 typedef struct {
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48 uint16_t fnum;
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49 uint8_t block;
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50 uint8_t block_fnum_latch;
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51 uint8_t keycode;
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52 } ym_supp;
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53
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54 #define YM_PART1_START 0x21
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55 #define YM_PART2_START 0x30
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56 #define YM_REG_END 0xB8
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57 #define YM_PART1_REGS (YM_REG_END-YM_PART1_START)
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58 #define YM_PART2_REGS (YM_REG_END-YM_PART2_START)
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59
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60 typedef struct {
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61 int16_t *audio_buffer;
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62 int16_t *back_buffer;
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63 uint64_t buffer_fraction;
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64 uint64_t buffer_inc;
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65 uint32_t clock_inc;
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66 uint32_t buffer_pos;
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67 uint32_t sample_rate;
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68 uint32_t sample_limit;
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69 uint32_t current_cycle;
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70 //TODO: Condense the next two fields into one
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71 uint32_t write_cycle;
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72 uint32_t busy_cycles;
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73 uint32_t lowpass_alpha;
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74 ym_operator operators[NUM_OPERATORS];
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75 ym_channel channels[NUM_CHANNELS];
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76 uint16_t timer_a;
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77 uint16_t timer_a_load;
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78 uint16_t env_counter;
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79 ym_supp ch3_supp[3];
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80 int16_t last_left;
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81 int16_t last_right;
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82 uint8_t timer_b;
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83 uint8_t sub_timer_b;
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84 uint8_t timer_b_load;
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85 uint8_t ch3_mode;
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86 uint8_t current_op;
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87 uint8_t current_env_op;
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88
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89 uint8_t timer_control;
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90 uint8_t dac_enable;
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91 uint8_t lfo_enable;
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92 uint8_t lfo_freq;
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93 uint8_t lfo_counter;
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94 uint8_t lfo_am_step;
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95 uint8_t lfo_pm_step;
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96 uint8_t status;
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97 uint8_t selected_reg;
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98 uint8_t selected_part;
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99 uint8_t part1_regs[YM_PART1_REGS];
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100 uint8_t part2_regs[YM_PART2_REGS];
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101 } ym2612_context;
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102
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103 enum {
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104 REG_LFO = 0x22,
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105 REG_TIMERA_HIGH = 0x24,
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106 REG_TIMERA_LOW,
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107 REG_TIMERB,
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108 REG_TIME_CTRL,
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109 REG_KEY_ONOFF,
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110 REG_DAC = 0x2A,
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111 REG_DAC_ENABLE,
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112
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113 REG_DETUNE_MULT = 0x30,
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114 REG_TOTAL_LEVEL = 0x40,
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115 REG_ATTACK_KS = 0x50,
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116 REG_DECAY_AM = 0x60,
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117 REG_SUSTAIN_RATE = 0x70,
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118 REG_S_LVL_R_RATE = 0x80,
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119
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120 REG_FNUM_LOW = 0xA0,
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121 REG_BLOCK_FNUM_H = 0xA4,
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122 REG_FNUM_LOW_CH3 = 0xA8,
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123 REG_BLOCK_FN_CH3 = 0xAC,
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124 REG_ALG_FEEDBACK = 0xB0,
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125 REG_LR_AMS_PMS = 0xB4
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126 };
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127
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128 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options, uint32_t lowpass_cutoff);
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129 void ym_free(ym2612_context *context);
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130 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock);
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131 void ym_run(ym2612_context * context, uint32_t to_cycle);
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132 void ym_address_write_part1(ym2612_context * context, uint8_t address);
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133 void ym_address_write_part2(ym2612_context * context, uint8_t address);
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134 void ym_data_write(ym2612_context * context, uint8_t value);
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135 uint8_t ym_read_status(ym2612_context * context);
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136 uint8_t ym_load_gst(ym2612_context * context, FILE * gstfile);
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137 uint8_t ym_save_gst(ym2612_context * context, FILE * gstfile);
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138 void ym_print_channel_info(ym2612_context *context, int channel);
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139 void ym_print_timer_info(ym2612_context *context);
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140
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141 #endif //YM2612_H_
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142