repos/blastem: m68k_core

annotate m68k_core_x86.c @ 1026:7267bc1ab547

Fix bug in 68K movep.l when the destination is a register mapped to a host register

author	Michael Pavone <pavone@retrodev.com>
date	Tue, 10 May 2016 08:59:17 -0700
parents	784bc1e45e80
children	2ec5e6eaf81d

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	2 Copyright 2013 Michael Pavone
485 b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	5 */
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "gen_x86.h"
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	7 #include "m68k_core.h"
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	8 #include "m68k_internal.h"
208 3457dc6fd558 Tweaks to make blastem compatible with m68k-tester Mike Pavone <pavone@retrodev.com> parents: 207 diff changeset	9 #include "68kinst.h"
95 dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding Mike Pavone <pavone@retrodev.com> parents: 93 diff changeset	10 #include "mem.h"
557 acec5464fa1e Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively Mike Pavone <pavone@retrodev.com> parents: 555 diff changeset	11 #include "backend.h"
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 757 diff changeset	12 #include "util.h"
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	13 #include <stdio.h>
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	14 #include <stddef.h>
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	15 #include <stdlib.h>
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	16 #include <string.h>
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	17
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	18 enum {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	19 FLAG_X,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	20 FLAG_N,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	21 FLAG_Z,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	22 FLAG_V,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	23 FLAG_C
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	24 };
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	25
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	26 void set_flag(m68k_options * opts, uint8_t val, uint8_t flag)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	27 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	28 if (opts->flag_regs[flag] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	29 mov_ir(&opts->gen.code, val, opts->flag_regs[flag], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	30 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	31 int8_t offset = offsetof(m68k_context, flags) + flag;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	32 if (offset) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	33 mov_irdisp(&opts->gen.code, val, opts->gen.context_reg, offset, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	34 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	35 mov_irind(&opts->gen.code, val, opts->gen.context_reg, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	36 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	37 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	38 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	39
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	40 void set_flag_cond(m68k_options *opts, uint8_t cond, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	41 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	42 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	43 setcc_r(&opts->gen.code, cond, opts->flag_regs[flag]);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	44 } else {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	45 int8_t offset = offsetof(m68k_context, flags) + flag;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	46 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	47 setcc_rdisp(&opts->gen.code, cond, opts->gen.context_reg, offset);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	48 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	49 setcc_rind(&opts->gen.code, cond, opts->gen.context_reg);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	50 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	51 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	52 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	53
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	54 void check_flag(m68k_options *opts, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	55 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	56 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	57 cmp_ir(&opts->gen.code, 0, opts->flag_regs[flag], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	58 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	59 cmp_irdisp(&opts->gen.code, 0, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	60 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	61 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	62
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	63 void flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	64 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	65 if (opts->flag_regs[flag] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	66 mov_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	67 } else {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	68 int8_t offset = offsetof(m68k_context, flags) + flag;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	69 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	70 mov_rdispr(&opts->gen.code, opts->gen.context_reg, offset, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	71 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	72 mov_rindr(&opts->gen.code, opts->gen.context_reg, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	73 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	74 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	75 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	76
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	77 void reg_to_flag(m68k_options *opts, uint8_t reg, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	78 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	79 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	80 mov_rr(&opts->gen.code, reg, opts->flag_regs[flag], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	81 } else {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	82 int8_t offset = offsetof(m68k_context, flags) + flag;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	83 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	84 mov_rrdisp(&opts->gen.code, reg, opts->gen.context_reg, offset, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	85 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	86 mov_rrind(&opts->gen.code, reg, opts->gen.context_reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	87 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	88 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	89 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	90
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	91 void flag_to_flag(m68k_options *opts, uint8_t flag1, uint8_t flag2)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	92 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	93 code_info *code = &opts->gen.code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	94 if (opts->flag_regs[flag1] >= 0 && opts->flag_regs[flag2] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	95 mov_rr(code, opts->flag_regs[flag1], opts->flag_regs[flag2], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	96 } else if(opts->flag_regs[flag1] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	97 mov_rrdisp(code, opts->flag_regs[flag1], opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	98 } else if (opts->flag_regs[flag2] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	99 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->flag_regs[flag2], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	100 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	101 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	102 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	103 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	104 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	105 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	106 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	107
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	108 void update_flags(m68k_options *opts, uint32_t update_mask)
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	109 {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	110 uint8_t native_flags[] = {0, CC_S, CC_Z, CC_O, CC_C};
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	111 for (int8_t flag = FLAG_C; flag >= FLAG_X; --flag)
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	112 {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	113 if (update_mask & X0 << (flag*3)) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	114 set_flag(opts, 0, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	115 } else if(update_mask & X1 << (flag*3)) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	116 set_flag(opts, 1, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	117 } else if(update_mask & X << (flag*3)) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	118 if (flag == FLAG_X) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	119 if (opts->flag_regs[FLAG_C] >= 0 \|\| !(update_mask & (C0\|C1\|C))) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	120 flag_to_flag(opts, FLAG_C, FLAG_X);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	121 } else if(update_mask & C0) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	122 set_flag(opts, 0, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	123 } else if(update_mask & C1) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	124 set_flag(opts, 1, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	125 } else {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	126 set_flag_cond(opts, CC_C, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	127 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	128 } else {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	129 set_flag_cond(opts, native_flags[flag], flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	130 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	131 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	132 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	133 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	134
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	135 void flag_to_carry(m68k_options * opts, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	136 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	137 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	138 bt_ir(&opts->gen.code, 0, opts->flag_regs[flag], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	139 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	140 bt_irdisp(&opts->gen.code, 0, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	141 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	142 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	143
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	144 void or_flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	145 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	146 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	147 or_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	148 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	149 or_rdispr(&opts->gen.code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	150 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	151 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	152
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	153 void xor_flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	154 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	155 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	156 xor_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	157 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	158 xor_rdispr(&opts->gen.code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	159 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	160 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	161
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	162 void xor_flag(m68k_options *opts, uint8_t val, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	163 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	164 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	165 xor_ir(&opts->gen.code, val, opts->flag_regs[flag], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	166 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	167 xor_irdisp(&opts->gen.code, val, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	168 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	169 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	170
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	171 void cmp_flags(m68k_options *opts, uint8_t flag1, uint8_t flag2)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	172 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	173 code_info *code = &opts->gen.code;
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	174 if (opts->flag_regs[flag1] >= 0 && opts->flag_regs[flag2] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	175 cmp_rr(code, opts->flag_regs[flag1], opts->flag_regs[flag2], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	176 } else if(opts->flag_regs[flag1] >= 0 \|\| opts->flag_regs[flag2] >= 0) {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	177 if (opts->flag_regs[flag2] >= 0) {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	178 uint8_t tmp = flag1;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	179 flag1 = flag2;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	180 flag2 = tmp;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	181 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	182 cmp_rrdisp(code, opts->flag_regs[flag1], opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	183 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	184 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	185 cmp_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	186 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	187 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	188
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	189 void areg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	190 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	191 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	192 mov_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	193 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	194 mov_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	195 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	196 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	197
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	198 void dreg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	199 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	200 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	201 mov_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	202 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	203 mov_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	204 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	205 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	206
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	207 void areg_to_native_sx(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	208 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	209 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	210 movsx_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_W, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	211 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	212 movsx_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_W, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	213 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	214 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	215
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	216 void dreg_to_native_sx(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	217 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	218 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	219 movsx_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	220 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	221 movsx_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_W, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	222 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	223 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	224
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	225 void native_to_areg(m68k_options *opts, uint8_t native_reg, uint8_t reg)
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 561 667 diff changeset	226 {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	227 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	228 mov_rr(&opts->gen.code, native_reg, opts->aregs[reg], SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	229 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	230 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, areg_offset(reg), SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	231 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	232 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	233
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	234 void native_to_dreg(m68k_options *opts, uint8_t native_reg, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	235 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	236 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	237 mov_rr(&opts->gen.code, native_reg, opts->dregs[reg], SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	238 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	239 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, dreg_offset(reg), SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	240 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	241 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	242
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	243 void ldi_areg(m68k_options *opts, int32_t value, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	244 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	245 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	246 mov_ir(&opts->gen.code, value, opts->aregs[reg], SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	247 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	248 mov_irdisp(&opts->gen.code, value, opts->gen.context_reg, areg_offset(reg), SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	249 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	250 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	251
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	252 void ldi_native(m68k_options *opts, int32_t value, uint8_t reg)
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	253 {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	254 mov_ir(&opts->gen.code, value, reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	255 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	256
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	257 void addi_native(m68k_options *opts, int32_t value, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	258 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	259 add_ir(&opts->gen.code, value, reg, SZ_D);
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 561 667 diff changeset	260 }
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	261
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	262 void subi_native(m68k_options *opts, int32_t value, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	263 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	264 sub_ir(&opts->gen.code, value, reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	265 }
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	266
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	267 void push_native(m68k_options *opts, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	268 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	269 push_r(&opts->gen.code, reg);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	270 }
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	271
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	272 void pop_native(m68k_options *opts, uint8_t reg)
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	273 {
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	274 pop_r(&opts->gen.code, reg);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	275 }
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	276
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	277 void sign_extend16_native(m68k_options *opts, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	278 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	279 movsx_rr(&opts->gen.code, reg, reg, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	280 }
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	281
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	282 void addi_areg(m68k_options *opts, int32_t val, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	283 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	284 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	285 add_ir(&opts->gen.code, val, opts->aregs[reg], SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	286 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	287 add_irdisp(&opts->gen.code, val, opts->gen.context_reg, areg_offset(reg), SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	288 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	289 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	290
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	291 void subi_areg(m68k_options *opts, int32_t val, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	292 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	293 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	294 sub_ir(&opts->gen.code, val, opts->aregs[reg], SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	295 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	296 sub_irdisp(&opts->gen.code, val, opts->gen.context_reg, areg_offset(reg), SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	297 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	298 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	299
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	300 void add_areg_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	301 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	302 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	303 add_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	304 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	305 add_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	306 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	307 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	308
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	309 void add_dreg_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	310 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	311 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	312 add_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	313 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	314 add_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	315 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	316 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	317
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	318 void calc_areg_displace(m68k_options opts, m68k_op_info op, uint8_t native_reg)
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	319 {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	320 areg_to_native(opts, op->params.regs.pri, native_reg);
751 cf09b189a0ca Fix negative offsets in calc_areg_displace Michael Pavone <pavone@retrodev.com> parents: 733 diff changeset	321 add_ir(&opts->gen.code, op->params.regs.displacement & 0x8000 ? op->params.regs.displacement \| 0xFFFF0000 : op->params.regs.displacement, native_reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	322 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	323
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	324 void calc_index_disp8(m68k_options opts, m68k_op_info op, uint8_t native_reg)
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	325 {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	326 uint8_t sec_reg = (op->params.regs.sec >> 1) & 0x7;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	327 if (op->params.regs.sec & 1) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	328 if (op->params.regs.sec & 0x10) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	329 add_areg_native(opts, sec_reg, native_reg);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	330 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	331 add_dreg_native(opts, sec_reg, native_reg);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	332 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	333 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	334 uint8_t other_reg = native_reg == opts->gen.scratch1 ? opts->gen.scratch2 : opts->gen.scratch1;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	335 if (op->params.regs.sec & 0x10) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	336 areg_to_native_sx(opts, sec_reg, other_reg);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	337 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	338 dreg_to_native_sx(opts, sec_reg, other_reg);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	339 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	340 add_rr(&opts->gen.code, other_reg, native_reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	341 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	342 if (op->params.regs.displacement) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	343 add_ir(&opts->gen.code, op->params.regs.displacement, native_reg, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	344 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	345 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	346
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	347 void calc_areg_index_disp8(m68k_options opts, m68k_op_info op, uint8_t native_reg)
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	348 {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	349 areg_to_native(opts, op->params.regs.pri, native_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	350 calc_index_disp8(opts, op, native_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	351 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	352
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	353 void translate_m68k_op(m68kinst * inst, host_ea * ea, m68k_options * opts, uint8_t dst)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	354 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	355 code_info *code = &opts->gen.code;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	356 m68k_op_info *op = dst ? &inst->dst : &inst->src;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	357 int8_t reg = native_reg(op, opts);
81 6d231dbe75ab Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode Mike Pavone <pavone@retrodev.com> parents: 78 diff changeset	358 uint8_t sec_reg;
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 561 667 diff changeset	359 int32_t dec_amount, inc_amount;
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	360 if (reg >= 0) {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	361 ea->mode = MODE_REG_DIRECT;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	362 if (!dst && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	363 movsx_rr(code, reg, opts->gen.scratch1, SZ_W, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	364 ea->base = opts->gen.scratch1;
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	365 } else {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	366 ea->base = reg;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	367 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	368 return;
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	369 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	370 switch (op->addr_mode)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	371 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	372 case MODE_REG:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	373 case MODE_AREG:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	374 //We only get one memory parameter, so if the dst operand is a register in memory,
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	375 //we need to copy this to a temp register first if we're translating the src operand
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	376 if (dst \|\| native_reg(&(inst->dst), opts) >= 0 \|\| inst->dst.addr_mode == MODE_UNUSED \|\| !(inst->dst.addr_mode == MODE_REG \|\| inst->dst.addr_mode == MODE_AREG)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	377 \|\| inst->op == M68K_EXG) {
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	378
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	379 ea->mode = MODE_REG_DISPLACE8;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	380 ea->base = opts->gen.context_reg;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	381 ea->disp = reg_offset(op);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	382 } else {
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	383 if (inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) {
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	384 movsx_rdispr(code, opts->gen.context_reg, reg_offset(op), opts->gen.scratch1, SZ_W, SZ_D);
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	385 } else {
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	386 mov_rdispr(code, opts->gen.context_reg, reg_offset(op), opts->gen.scratch1, inst->extra.size);
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	387 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	388 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	389 ea->base = opts->gen.scratch1;
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	390 //we're explicitly handling the areg dest here, so we exit immediately
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	391 return;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	392 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	393 break;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	394 case MODE_AREG_PREDEC:
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	395 if (dst && inst->src.addr_mode == MODE_AREG_PREDEC) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	396 push_r(code, opts->gen.scratch1);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	397 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	398 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (op->params.regs.pri == 7 ? 2 :1));
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	399 if (!dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	400 cycles(&opts->gen, PREDEC_PENALTY);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	401 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	402 subi_areg(opts, dec_amount, op->params.regs.pri);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	403 case MODE_AREG_INDIRECT:
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	404 case MODE_AREG_POSTINC:
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	405 areg_to_native(opts, op->params.regs.pri, opts->gen.scratch1);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	406 m68k_read_size(opts, inst->extra.size);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	407
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	408 if (dst) {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	409 if (inst->src.addr_mode == MODE_AREG_PREDEC) {
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	410 //restore src operand to opts->gen.scratch2
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	411 pop_r(code, opts->gen.scratch2);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	412 } else {
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	413 //save reg value in opts->gen.scratch2 so we can use it to save the result in memory later
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	414 areg_to_native(opts, op->params.regs.pri, opts->gen.scratch2);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	415 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	416 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	417
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	418 if (op->addr_mode == MODE_AREG_POSTINC) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	419 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (op->params.regs.pri == 7 ? 2 : 1));
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	420 addi_areg(opts, inc_amount, op->params.regs.pri);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	421 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	422 ea->mode = MODE_REG_DIRECT;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	423 ea->base = (!dst && inst->dst.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) ? opts->gen.scratch2 : opts->gen.scratch1;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	424 break;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	425 case MODE_AREG_DISPLACE:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	426 cycles(&opts->gen, BUS);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	427 calc_areg_displace(opts, op, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	428 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	429 push_r(code, opts->gen.scratch1);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	430 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	431 m68k_read_size(opts, inst->extra.size);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	432 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	433 pop_r(code, opts->gen.scratch2);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	434 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	435
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	436 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	437 ea->base = opts->gen.scratch1;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	438 break;
81 6d231dbe75ab Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode Mike Pavone <pavone@retrodev.com> parents: 78 diff changeset	439 case MODE_AREG_INDEX_DISP8:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	440 cycles(&opts->gen, 6);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	441 calc_areg_index_disp8(opts, op, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	442 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	443 push_r(code, opts->gen.scratch1);
81 6d231dbe75ab Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode Mike Pavone <pavone@retrodev.com> parents: 78 diff changeset	444 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	445 m68k_read_size(opts, inst->extra.size);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	446 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	447 pop_r(code, opts->gen.scratch2);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	448 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	449
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	450 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	451 ea->base = opts->gen.scratch1;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	452 break;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	453 case MODE_PC_DISPLACE:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	454 cycles(&opts->gen, BUS);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	455 mov_ir(code, op->params.regs.displacement + inst->address+2, opts->gen.scratch1, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	456 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	457 push_r(code, opts->gen.scratch1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	458 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	459 m68k_read_size(opts, inst->extra.size);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	460 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	461 pop_r(code, opts->gen.scratch2);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	462 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	463
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	464 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	465 ea->base = opts->gen.scratch1;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	466 break;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	467 case MODE_PC_INDEX_DISP8:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	468 cycles(&opts->gen, 6);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	469 mov_ir(code, inst->address+2, opts->gen.scratch1, SZ_D);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	470 calc_index_disp8(opts, op, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	471 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	472 push_r(code, opts->gen.scratch1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	473 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	474 m68k_read_size(opts, inst->extra.size);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	475 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	476 pop_r(code, opts->gen.scratch2);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	477 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	478
98 104e257fb93c Allow indexed modes to be used as a destination Mike Pavone <pavone@retrodev.com> parents: 97 diff changeset	479 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	480 ea->base = opts->gen.scratch1;
98 104e257fb93c Allow indexed modes to be used as a destination Mike Pavone <pavone@retrodev.com> parents: 97 diff changeset	481 break;
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	482 case MODE_ABSOLUTE:
918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	483 case MODE_ABSOLUTE_SHORT:
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	484 cycles(&opts->gen, op->addr_mode == MODE_ABSOLUTE ? BUS*2 : BUS);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	485 mov_ir(code, op->params.immed, opts->gen.scratch1, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	486 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	487 push_r(code, opts->gen.scratch1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	488 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	489 m68k_read_size(opts, inst->extra.size);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	490 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	491 pop_r(code, opts->gen.scratch2);
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	492 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	493
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	494 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	495 ea->base = opts->gen.scratch1;
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	496 break;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	497 case MODE_IMMEDIATE:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	498 case MODE_IMMEDIATE_WORD:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	499 if (inst->variant != VAR_QUICK) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	500 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG && op->addr_mode == MODE_IMMEDIATE) ? BUS*2 : BUS);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	501 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	502 ea->mode = MODE_IMMED;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	503 ea->disp = op->params.immed;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	504 //sign extend value when the destination is an address register
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	505 if (inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD && ea->disp & 0x8000) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	506 ea->disp \|= 0xFFFF0000;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	507 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	508 return;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	509 default:
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	510 m68k_disasm(inst, disasm_buf);
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 757 diff changeset	511 fatal_error("%X: %s\naddress mode %d not implemented (%s)\n", inst->address, disasm_buf, op->addr_mode, dst ? "dst" : "src");
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	512 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	513 if (!dst && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	514 if (ea->mode == MODE_REG_DIRECT) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	515 movsx_rr(code, ea->base, opts->gen.scratch1, SZ_W, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	516 } else {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	517 movsx_rdispr(code, ea->base, ea->disp, opts->gen.scratch1, SZ_W, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	518 ea->mode = MODE_REG_DIRECT;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	519 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	520 ea->base = opts->gen.scratch1;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	521 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	522 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	523
687 a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	524 void check_user_mode_swap_ssp_usp(m68k_options *opts)
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	525 {
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	526 code_info * code = &opts->gen.code;
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	527 //Check if we've switched to user mode and swap stack pointers if needed
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	528 bt_irdisp(code, 5, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	529 code_ptr end_off = code->cur + 1;
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	530 jcc(code, CC_C, code->cur + 2);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	531 swap_ssp_usp(opts);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	532 *end_off = code->cur - (end_off + 1);
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	533 }
a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	534
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	535 void translate_m68k_move(m68k_options * opts, m68kinst * inst)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	536 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	537 code_info *code = &opts->gen.code;
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	538 int8_t reg, flags_reg, sec_reg;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	539 uint8_t dir = 0;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	540 int32_t offset;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	541 int32_t inc_amount, dec_amount;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	542 host_ea src;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	543 translate_m68k_op(inst, &src, opts, 0);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	544 reg = native_reg(&(inst->dst), opts);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	545
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	546 if (inst->dst.addr_mode != MODE_AREG) {
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	547 if (src.mode == MODE_REG_DIRECT) {
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	548 flags_reg = src.base;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	549 } else {
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	550 if (reg >= 0) {
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	551 flags_reg = reg;
128 fe598ffd85ce Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed Mike Pavone <pavone@retrodev.com> parents: 126 diff changeset	552 } else {
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	553 if(src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	554 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	555 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	556 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	557 }
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	558 src.mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	559 flags_reg = src.base = opts->gen.scratch1;
128 fe598ffd85ce Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed Mike Pavone <pavone@retrodev.com> parents: 126 diff changeset	560 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	561 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	562 }
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	563 uint8_t size = inst->extra.size;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	564 switch(inst->dst.addr_mode)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	565 {
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	566 case MODE_AREG:
3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	567 size = OPSIZE_LONG;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	568 case MODE_REG:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	569 if (reg >= 0) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	570 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	571 mov_rr(code, src.base, reg, size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	572 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	573 mov_rdispr(code, src.base, src.disp, reg, size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	574 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	575 mov_ir(code, src.disp, reg, size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	576 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	577 } else if(src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	578 mov_rrdisp(code, src.base, opts->gen.context_reg, reg_offset(&(inst->dst)), size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	579 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	580 mov_irdisp(code, src.disp, opts->gen.context_reg, reg_offset(&(inst->dst)), size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	581 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	582 break;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	583 case MODE_AREG_PREDEC:
182 924af8b2f7a0 Fix -(a7) dest when size is byte Mike Pavone <pavone@retrodev.com> parents: 181 diff changeset	584 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1));
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	585 case MODE_AREG_INDIRECT:
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	586 case MODE_AREG_POSTINC:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	587 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	588 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	589 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	590 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	591 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	592 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	593 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	594 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	595 }
610 314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	596 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	597 subi_areg(opts, dec_amount, inst->dst.params.regs.pri);
314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	598 }
314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	599 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	600 break;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	601 case MODE_AREG_DISPLACE:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	602 cycles(&opts->gen, BUS);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	603 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	604 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	605 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	606 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	607 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	608 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	609 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	610 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	611 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	612 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	613 break;
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	614 case MODE_AREG_INDEX_DISP8:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	615 cycles(&opts->gen, 6);//TODO: Check to make sure this is correct
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	616 //calc_areg_index_disp8 will clober scratch1 when a 16-bit index is used
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	617 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	618 push_r(code, opts->gen.scratch1);
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	619 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	620 calc_areg_index_disp8(opts, &inst->dst, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	621 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	622 pop_r(code, opts->gen.scratch1);
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	623 }
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	624 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	625 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	626 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	627 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	628 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	629 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	630 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	631 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	632 }
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	633 break;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	634 case MODE_PC_DISPLACE:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	635 cycles(&opts->gen, BUS);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	636 mov_ir(code, inst->dst.params.regs.displacement + inst->address+2, opts->gen.scratch2, SZ_D);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	637 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	638 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	639 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	640 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	641 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	642 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	643 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	644 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	645 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	646 break;
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	647 case MODE_PC_INDEX_DISP8:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	648 cycles(&opts->gen, 6);//TODO: Check to make sure this is correct
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	649 mov_ir(code, inst->address, opts->gen.scratch2, SZ_D);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	650 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	651 push_r(code, opts->gen.scratch1);
689 858e31f977ae A couple more indentation fixes Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	652 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	653 calc_index_disp8(opts, &inst->dst, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	654 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	655 pop_r(code, opts->gen.scratch1);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	656 }
f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	657 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	658 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	659 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	660 }
f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	661 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	662 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	663 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	664 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	665 }
f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	666 break;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	667 case MODE_ABSOLUTE:
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	668 case MODE_ABSOLUTE_SHORT:
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	669 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	670 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	671 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	672 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	673 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	674 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	675 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	676 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	677 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	678 if (inst->dst.addr_mode == MODE_ABSOLUTE) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	679 cycles(&opts->gen, BUS*2);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	680 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	681 cycles(&opts->gen, BUS);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	682 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	683 mov_ir(code, inst->dst.params.immed, opts->gen.scratch2, SZ_D);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	684 break;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	685 default:
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	686 m68k_disasm(inst, disasm_buf);
792 724bbec47f86 Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows). Michael Pavone <pavone@retrodev.com> parents: 757 diff changeset	687 fatal_error("%X: %s\naddress mode %d not implemented (move dst)\n", inst->address, disasm_buf, inst->dst.addr_mode);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	688 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	689
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	690 if (inst->dst.addr_mode != MODE_AREG) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	691 cmp_ir(code, 0, flags_reg, inst->extra.size);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	692 update_flags(opts, N\|Z\|V0\|C0);
689 858e31f977ae A couple more indentation fixes Michael Pavone <pavone@retrodev.com> parents: 688 diff changeset	693 }
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	694 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG) {
979 771875b5f519 Fix order of writes for move.l with a predec destination Michael Pavone <pavone@retrodev.com> parents: 976 diff changeset	695 m68k_write_size(opts, inst->extra.size, inst->dst.addr_mode == MODE_AREG_PREDEC);
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	696 if (inst->dst.addr_mode == MODE_AREG_POSTINC) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	697 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1));
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	698 addi_areg(opts, inc_amount, inst->dst.params.regs.pri);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	699 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	700 }
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	701
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	702 //add cycles for prefetch
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	703 cycles(&opts->gen, BUS);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	704 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	705
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	706 void translate_m68k_clr(m68k_options * opts, m68kinst * inst)
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	707 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	708 code_info *code = &opts->gen.code;
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	709 update_flags(opts, N0\|V0\|C0\|Z1);
92 c3d034e076ee Fix some bugs in emulation of CLR Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	710 int8_t reg = native_reg(&(inst->dst), opts);
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	711 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	712 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 6 : 4));
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	713 xor_rr(code, reg, reg, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	714 return;
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	715 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	716 host_ea dst_op;
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	717 //TODO: fix timing
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	718 translate_m68k_op(inst, &dst_op, opts, 1);
92 c3d034e076ee Fix some bugs in emulation of CLR Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	719 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	720 xor_rr(code, dst_op.base, dst_op.base, inst->extra.size);
92 c3d034e076ee Fix some bugs in emulation of CLR Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	721 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	722 mov_irdisp(code, 0, dst_op.base, dst_op.disp, inst->extra.size);
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	723 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	724 m68k_save_result(inst, opts);
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	725 }
f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	726
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	727 void translate_m68k_ext(m68k_options * opts, m68kinst * inst)
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	728 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	729 code_info *code = &opts->gen.code;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	730 host_ea dst_op;
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	731 uint8_t dst_size = inst->extra.size;
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	732 inst->extra.size--;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	733 translate_m68k_op(inst, &dst_op, opts, 1);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	734 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	735 movsx_rr(code, dst_op.base, dst_op.base, inst->extra.size, dst_size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	736 cmp_ir(code, 0, dst_op.base, dst_size);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	737 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	738 movsx_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, inst->extra.size, dst_size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	739 cmp_ir(code, 0, opts->gen.scratch1, dst_size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	740 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, dst_size);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	741 }
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	742 inst->extra.size = dst_size;
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	743 update_flags(opts, N\|V0\|C0\|Z);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	744 //M68K EXT only operates on registers so no need for a call to save result here
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	745 }
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	746
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	747 uint8_t m68k_eval_cond(m68k_options * opts, uint8_t cc)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	748 {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	749 uint8_t cond = CC_NZ;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	750 switch (cc)
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	751 {
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	752 case COND_HIGH:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	753 cond = CC_Z;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	754 case COND_LOW_SAME:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	755 flag_to_reg(opts, FLAG_Z, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	756 or_flag_to_reg(opts, FLAG_C, opts->gen.scratch1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	757 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	758 case COND_CARRY_CLR:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	759 cond = CC_Z;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	760 case COND_CARRY_SET:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	761 check_flag(opts, FLAG_C);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	762 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	763 case COND_NOT_EQ:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	764 cond = CC_Z;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	765 case COND_EQ:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	766 check_flag(opts, FLAG_Z);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	767 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	768 case COND_OVERF_CLR:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	769 cond = CC_Z;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	770 case COND_OVERF_SET:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	771 check_flag(opts, FLAG_V);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	772 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	773 case COND_PLUS:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	774 cond = CC_Z;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	775 case COND_MINUS:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	776 check_flag(opts, FLAG_N);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	777 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	778 case COND_GREATER_EQ:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	779 cond = CC_Z;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	780 case COND_LESS:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	781 cmp_flags(opts, FLAG_N, FLAG_V);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	782 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	783 case COND_GREATER:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	784 cond = CC_Z;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	785 case COND_LESS_EQ:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	786 flag_to_reg(opts, FLAG_V, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	787 xor_flag_to_reg(opts, FLAG_N, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	788 or_flag_to_reg(opts, FLAG_Z, opts->gen.scratch1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	789 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	790 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	791 return cond;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	792 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	793
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	794 void translate_m68k_bcc(m68k_options * opts, m68kinst * inst)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	795 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	796 code_info *code = &opts->gen.code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	797 cycles(&opts->gen, 10);//TODO: Adjust this for branch not taken case
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	798 int32_t disp = inst->src.params.immed;
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	799 uint32_t after = inst->address + 2;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	800 if (inst->extra.cond == COND_TRUE) {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	801 jump_m68k_abs(opts, after + disp);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	802 } else {
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 698 diff changeset	803 code_ptr dest_addr = get_native_address(opts, after + disp);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	804 uint8_t cond = m68k_eval_cond(opts, inst->extra.cond);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	805 if (!dest_addr) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	806 opts->gen.deferred = defer_address(opts->gen.deferred, after + disp, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	807 //dummy address to be replaced later, make sure it generates a 4-byte displacement
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	808 dest_addr = code->cur + 256;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	809 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	810 jcc(code, cond, dest_addr);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	811 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	812 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	813
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	814 void translate_m68k_scc(m68k_options * opts, m68kinst * inst)
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	815 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	816 code_info *code = &opts->gen.code;
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	817 uint8_t cond = inst->extra.cond;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	818 host_ea dst_op;
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	819 inst->extra.size = OPSIZE_BYTE;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	820 translate_m68k_op(inst, &dst_op, opts, 1);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	821 if (cond == COND_TRUE \|\| cond == COND_FALSE) {
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	822 if ((inst->dst.addr_mode == MODE_REG \|\| inst->dst.addr_mode == MODE_AREG) && inst->extra.cond == COND_TRUE) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	823 cycles(&opts->gen, 6);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	824 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	825 cycles(&opts->gen, BUS);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	826 }
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	827 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	828 mov_ir(code, cond == COND_TRUE ? 0xFF : 0, dst_op.base, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	829 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	830 mov_irdisp(code, cond == COND_TRUE ? 0xFF : 0, dst_op.base, dst_op.disp, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	831 }
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	832 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	833 uint8_t cc = m68k_eval_cond(opts, cond);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	834 check_alloc_code(code, 6*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	835 code_ptr true_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	836 jcc(code, cc, code->cur+2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	837 cycles(&opts->gen, BUS);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	838 if (dst_op.mode == MODE_REG_DIRECT) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	839 mov_ir(code, 0, dst_op.base, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	840 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	841 mov_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	842 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	843 code_ptr end_off = code->cur+1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	844 jmp(code, code->cur+2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	845 *true_off = code->cur - (true_off+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	846 cycles(&opts->gen, 6);
179 68af8a56ab7a Fix scc to set reg to 0xFF rather than 1 when the condition is true Mike Pavone <pavone@retrodev.com> parents: 178 diff changeset	847 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	848 mov_ir(code, 0xFF, dst_op.base, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	849 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	850 mov_irdisp(code, 0xFF, dst_op.base, dst_op.disp, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	851 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	852 *end_off = code->cur - (end_off+1);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	853 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	854 m68k_save_result(inst, opts);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	855 }
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	856
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	857 void translate_m68k_dbcc(m68k_options * opts, m68kinst * inst)
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	858 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	859 code_info *code = &opts->gen.code;
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	860 //best case duration
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	861 cycles(&opts->gen, 10);
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	862 code_ptr skip_loc = NULL;
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	863 //TODO: Check if COND_TRUE technically valid here even though
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	864 //it's basically a slow NOP
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	865 if (inst->extra.cond != COND_FALSE) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	866 uint8_t cond = m68k_eval_cond(opts, inst->extra.cond);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	867 check_alloc_code(code, 6*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	868 skip_loc = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	869 jcc(code, cond, code->cur + 2);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	870 }
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	871 if (opts->dregs[inst->dst.params.regs.pri] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	872 sub_ir(code, 1, opts->dregs[inst->dst.params.regs.pri], SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	873 cmp_ir(code, -1, opts->dregs[inst->dst.params.regs.pri], SZ_W);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	874 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	875 sub_irdisp(code, 1, opts->gen.context_reg, offsetof(m68k_context, dregs) + 4 * inst->dst.params.regs.pri, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	876 cmp_irdisp(code, -1, opts->gen.context_reg, offsetof(m68k_context, dregs) + 4 * inst->dst.params.regs.pri, SZ_W);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	877 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	878 code_ptr loop_end_loc = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	879 jcc(code, CC_Z, code->cur + 2);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	880 uint32_t after = inst->address + 2;
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	881 jump_m68k_abs(opts, after + inst->src.params.immed);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	882 *loop_end_loc = code->cur - (loop_end_loc+1);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	883 if (skip_loc) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	884 cycles(&opts->gen, 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	885 *skip_loc = code->cur - (skip_loc+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	886 cycles(&opts->gen, 2);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	887 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	888 cycles(&opts->gen, 4);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	889 }
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	890 }
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	891
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	892 void translate_m68k_movep(m68k_options * opts, m68kinst * inst)
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	893 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	894 code_info *code = &opts->gen.code;
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	895 int8_t reg;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	896 cycles(&opts->gen, BUS*2);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	897 if (inst->src.addr_mode == MODE_REG) {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	898 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	899 reg = native_reg(&(inst->src), opts);
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	900 if (inst->extra.size == OPSIZE_LONG) {
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	901 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	902 mov_rr(code, reg, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	903 shr_ir(code, 24, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	904 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	905 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	906 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	907 mov_rr(code, reg, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	908 shr_ir(code, 16, opts->gen.scratch1, SZ_D);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	909
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	910 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	911 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+3, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	912 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	913 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	914 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	915 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+2, opts->gen.scratch1, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	916 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	917 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	918 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	919 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	920 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	921 add_ir(code, 2, opts->gen.scratch2, SZ_D);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	922 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	923 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	924 mov_rr(code, reg, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	925 shr_ir(code, 8, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	926 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	927 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	928 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	929 mov_rr(code, reg, opts->gen.scratch1, SZ_W);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	930 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	931 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+1, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	932 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	933 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	934 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	935 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src)), opts->gen.scratch1, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	936 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	937 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	938 call(code, opts->write_8);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	939 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	940 calc_areg_displace(opts, &inst->src, opts->gen.scratch1);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	941 reg = native_reg(&(inst->dst), opts);
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	942 if (inst->extra.size == OPSIZE_LONG) {
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	943 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	944 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	945 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	946 shl_ir(code, 24, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	947 mov_rr(code, opts->gen.scratch1, reg, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	948 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	949 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	950 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	951 call(code, opts->read_8);
1026 7267bc1ab547 Fix bug in 68K movep.l when the destination is a register mapped to a host register Michael Pavone <pavone@retrodev.com> parents: 996 diff changeset	952 movzx_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_B, SZ_W);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	953 shl_ir(code, 16, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	954 or_rr(code, opts->gen.scratch1, reg, SZ_D);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	955 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	956 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	957 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	958 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+3, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	959 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	960 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	961 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	962 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	963 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+2, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	964 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	965 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	966 add_ir(code, 2, opts->gen.scratch1, SZ_D);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	967 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	968 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	969 call(code, opts->read_8);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	970 if (reg >= 0) {
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	971
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	972 shl_ir(code, 8, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	973 mov_rr(code, opts->gen.scratch1, reg, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	974 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	975 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	976 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	977 mov_rr(code, opts->gen.scratch1, reg, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	978 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	979 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	980 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	981 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	982 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	983 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst)), SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	984 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	985 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	986 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	987
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	988 typedef void (shift_ir_t)(code_info code, uint8_t val, uint8_t dst, uint8_t size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	989 typedef void (shift_irdisp_t)(code_info code, uint8_t val, uint8_t dst_base, int32_t disp, uint8_t size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	990 typedef void (shift_clr_t)(code_info code, uint8_t dst, uint8_t size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	991 typedef void (shift_clrdisp_t)(code_info code, uint8_t dst_base, int32_t disp, uint8_t size);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	992
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	993 void translate_shift(m68k_options * opts, m68kinst * inst, host_ea src_op, host_ea dst_op, shift_ir_t shift_ir, shift_irdisp_t shift_irdisp, shift_clr_t shift_clr, shift_clrdisp_t shift_clrdisp, shift_ir_t special, shift_irdisp_t special_disp)
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	994 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	995 code_info *code = &opts->gen.code;
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	996 code_ptr end_off = NULL;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	997 code_ptr nz_off = NULL;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	998 code_ptr z_off = NULL;
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	999 if (inst->src.addr_mode == MODE_UNUSED) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1000 cycles(&opts->gen, BUS);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1001 //Memory shift
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1002 shift_ir(code, 1, dst_op->base, SZ_W);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1003 } else {
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1004 if (src_op->mode == MODE_IMMED) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1005 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 8 : 6) + 2 * src_op->disp);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1006 if (src_op->disp != 1 && inst->op == M68K_ASL) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1007 set_flag(opts, 0, FLAG_V);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1008 for (int i = 0; i < src_op->disp; i++) {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1009 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1010 shift_ir(code, 1, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1011 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1012 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1013 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1014 check_alloc_code(code, 2*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1015 code_ptr after_flag_set = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1016 jcc(code, CC_NO, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1017 set_flag(opts, 1, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1018 *after_flag_set = code->cur - (after_flag_set+1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1019 }
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1020 } else {
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1021 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1022 shift_ir(code, src_op->disp, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1023 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1024 shift_irdisp(code, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1025 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1026 set_flag_cond(opts, CC_O, FLAG_V);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1027 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1028 } else {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1029 cycles(&opts->gen, inst->extra.size == OPSIZE_LONG ? 8 : 6);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1030 if (src_op->base != RCX) {
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1031 if (src_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1032 mov_rr(code, src_op->base, RCX, SZ_B);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1033 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1034 mov_rdispr(code, src_op->base, src_op->disp, RCX, SZ_B);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1035 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1036
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1037 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1038 and_ir(code, 63, RCX, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1039 check_alloc_code(code, 7*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1040 nz_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1041 jcc(code, CC_NZ, code->cur + 2);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1042 //Flag behavior for shift count of 0 is different for x86 than 68K
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1043 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1044 cmp_ir(code, 0, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1045 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1046 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1047 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1048 set_flag_cond(opts, CC_Z, FLAG_Z);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1049 set_flag_cond(opts, CC_S, FLAG_N);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1050 set_flag(opts, 0, FLAG_C);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1051 //For other instructions, this flag will be set below
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1052 if (inst->op == M68K_ASL) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1053 set_flag(opts, 0, FLAG_V);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1054 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1055 z_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1056 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1057 *nz_off = code->cur - (nz_off + 1);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1058 //add 2 cycles for every bit shifted
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1059 mov_ir(code, 2 * opts->gen.clock_divider, opts->gen.scratch2, SZ_D);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1060 imul_rr(code, RCX, opts->gen.scratch2, SZ_D);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1061 add_rr(code, opts->gen.scratch2, opts->gen.cycles, SZ_D);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1062 if (inst->op == M68K_ASL) {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1063 //ASL has Overflow flag behavior that depends on all of the bits shifted through the MSB
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1064 //Easiest way to deal with this is to shift one bit at a time
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1065 set_flag(opts, 0, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1066 check_alloc_code(code, 5*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1067 code_ptr loop_start = code->cur;
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1068 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1069 shift_ir(code, 1, dst_op->base, inst->extra.size);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1070 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1071 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1072 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1073 code_ptr after_flag_set = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1074 jcc(code, CC_NO, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1075 set_flag(opts, 1, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1076 *after_flag_set = code->cur - (after_flag_set+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1077 loop(code, loop_start);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1078 } else {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1079 //x86 shifts modulo 32 for operand sizes less than 64-bits
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1080 //but M68K shifts modulo 64, so we need to check for large shifts here
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1081 cmp_ir(code, 32, RCX, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1082 check_alloc_code(code, 14*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1083 code_ptr norm_shift_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1084 jcc(code, CC_L, code->cur + 2);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1085 if (special) {
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	1086 code_ptr after_flag_set = NULL;
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1087 if (inst->extra.size == OPSIZE_LONG) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1088 code_ptr neq_32_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1089 jcc(code, CC_NZ, code->cur + 2);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1090
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1091 //set the carry bit to the lsb
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1092 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1093 special(code, 1, dst_op->base, SZ_D);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1094 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1095 special_disp(code, 1, dst_op->base, dst_op->disp, SZ_D);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1096 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1097 set_flag_cond(opts, CC_C, FLAG_C);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1098 after_flag_set = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1099 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1100 *neq_32_off = code->cur - (neq_32_off+1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1101 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1102 set_flag(opts, 0, FLAG_C);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1103 if (after_flag_set) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1104 *after_flag_set = code->cur - (after_flag_set+1);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1105 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1106 set_flag(opts, 1, FLAG_Z);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1107 set_flag(opts, 0, FLAG_N);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1108 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1109 xor_rr(code, dst_op->base, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1110 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1111 mov_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1112 }
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1113 } else {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1114 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1115 shift_ir(code, 31, dst_op->base, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1116 shift_ir(code, 1, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1117 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1118 shift_irdisp(code, 31, dst_op->base, dst_op->disp, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1119 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1120 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1121
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1122 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1123 end_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1124 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1125 *norm_shift_off = code->cur - (norm_shift_off+1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1126 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1127 shift_clr(code, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1128 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1129 shift_clrdisp(code, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1130 }
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1131 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1132 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1133
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1134 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1135 if (!special && end_off) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1136 *end_off = code->cur - (end_off + 1);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1137 }
583 819921b76b4b Use update_flags instead of individual set_flag calls in a few places Michael Pavone <pavone@retrodev.com> parents: 582 diff changeset	1138 update_flags(opts, C\|Z\|N);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1139 if (special && end_off) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1140 *end_off = code->cur - (end_off + 1);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1141 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1142 //set X flag to same as C flag
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1143 if (opts->flag_regs[FLAG_C] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1144 flag_to_flag(opts, FLAG_C, FLAG_X);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1145 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1146 set_flag_cond(opts, CC_C, FLAG_X);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1147 }
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1148 if (z_off) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1149 *z_off = code->cur - (z_off + 1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1150 }
219 8d3c16071559 Fix overflow flag behavior for lsl/lsr/asr Mike Pavone <pavone@retrodev.com> parents: 218 diff changeset	1151 if (inst->op != M68K_ASL) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1152 set_flag(opts, 0, FLAG_V);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1153 }
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1154 if (inst->src.addr_mode == MODE_UNUSED) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1155 m68k_save_result(inst, opts);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1156 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1157 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1158
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1159 void op_ir(code_info code, m68kinst inst, int32_t val, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1160 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1161 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1162 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1163 case M68K_ADD: add_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1164 case M68K_ADDX: adc_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1165 case M68K_AND: and_ir(code, val, dst, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1166 case M68K_BTST: bt_ir(code, val, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1167 case M68K_BSET: bts_ir(code, val, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1168 case M68K_BCLR: btr_ir(code, val, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1169 case M68K_BCHG: btc_ir(code, val, dst, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1170 case M68K_CMP: cmp_ir(code, val, dst, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1171 case M68K_EOR: xor_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1172 case M68K_OR: or_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1173 case M68K_ROL: rol_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1174 case M68K_ROR: ror_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1175 case M68K_ROXL: rcl_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1176 case M68K_ROXR: rcr_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1177 case M68K_SUB: sub_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1178 case M68K_SUBX: sbb_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1179 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1180 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1181
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1182 void op_irdisp(code_info code, m68kinst inst, int32_t val, uint8_t dst, int32_t disp, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1183 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1184 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1185 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1186 case M68K_ADD: add_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1187 case M68K_ADDX: adc_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1188 case M68K_AND: and_irdisp(code, val, dst, disp, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1189 case M68K_BTST: bt_irdisp(code, val, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1190 case M68K_BSET: bts_irdisp(code, val, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1191 case M68K_BCLR: btr_irdisp(code, val, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1192 case M68K_BCHG: btc_irdisp(code, val, dst, disp, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1193 case M68K_CMP: cmp_irdisp(code, val, dst, disp, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1194 case M68K_EOR: xor_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1195 case M68K_OR: or_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1196 case M68K_ROL: rol_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1197 case M68K_ROR: ror_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1198 case M68K_ROXL: rcl_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1199 case M68K_ROXR: rcr_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1200 case M68K_SUB: sub_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1201 case M68K_SUBX: sbb_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1202 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1203 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1204
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1205 void op_rr(code_info code, m68kinst inst, uint8_t src, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1206 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1207 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1208 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1209 case M68K_ADD: add_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1210 case M68K_ADDX: adc_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1211 case M68K_AND: and_rr(code, src, dst, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1212 case M68K_BTST: bt_rr(code, src, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1213 case M68K_BSET: bts_rr(code, src, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1214 case M68K_BCLR: btr_rr(code, src, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1215 case M68K_BCHG: btc_rr(code, src, dst, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1216 case M68K_CMP: cmp_rr(code, src, dst, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1217 case M68K_EOR: xor_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1218 case M68K_OR: or_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1219 case M68K_SUB: sub_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1220 case M68K_SUBX: sbb_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1221 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1222 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1223
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1224 void op_rrdisp(code_info code, m68kinst inst, uint8_t src, uint8_t dst, int32_t disp, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1225 {
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	1226 switch(inst->op)
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1227 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1228 case M68K_ADD: add_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1229 case M68K_ADDX: adc_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1230 case M68K_AND: and_rrdisp(code, src, dst, disp, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1231 case M68K_BTST: bt_rrdisp(code, src, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1232 case M68K_BSET: bts_rrdisp(code, src, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1233 case M68K_BCLR: btr_rrdisp(code, src, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1234 case M68K_BCHG: btc_rrdisp(code, src, dst, disp, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1235 case M68K_CMP: cmp_rrdisp(code, src, dst, disp, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1236 case M68K_EOR: xor_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1237 case M68K_OR: or_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1238 case M68K_SUB: sub_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1239 case M68K_SUBX: sbb_rrdisp(code, src, dst, disp, size); break;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1240 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1241 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1242
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1243 void op_rdispr(code_info code, m68kinst inst, uint8_t src, int32_t disp, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1244 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1245 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1246 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1247 case M68K_ADD: add_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1248 case M68K_ADDX: adc_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1249 case M68K_AND: and_rdispr(code, src, disp, dst, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1250 case M68K_CMP: cmp_rdispr(code, src, disp, dst, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1251 case M68K_EOR: xor_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1252 case M68K_OR: or_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1253 case M68K_SUB: sub_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1254 case M68K_SUBX: sbb_rdispr(code, src, disp, dst, size); break;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1255 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1256 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1257
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1258 void translate_m68k_arith(m68k_options opts, m68kinst inst, uint32_t flag_mask, host_ea src_op, host_ea dst_op)
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1259 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1260 code_info *code = &opts->gen.code;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1261 cycles(&opts->gen, BUS);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1262 if (inst->op == M68K_ADDX \|\| inst->op == M68K_SUBX) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1263 flag_to_carry(opts, FLAG_X);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1264 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1265 uint8_t size = inst->dst.addr_mode == MODE_AREG ? OPSIZE_LONG : inst->extra.size;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1266 if (src_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1267 if (dst_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1268 op_rr(code, inst, src_op->base, dst_op->base, size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1269 } else {
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1270 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1271 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1272 } else if (src_op->mode == MODE_REG_DISPLACE8) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1273 op_rdispr(code, inst, src_op->base, src_op->disp, dst_op->base, size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1274 } else {
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1275 if (dst_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1276 op_ir(code, inst, src_op->disp, dst_op->base, size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1277 } else {
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1278 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1279 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1280 }
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1281 if (inst->dst.addr_mode != MODE_AREG \|\| inst->op == M68K_CMP) {
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1282 update_flags(opts, flag_mask);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1283 if (inst->op == M68K_ADDX \|\| inst->op == M68K_SUBX) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1284 check_alloc_code(code, 2*MAX_INST_LEN);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1285 code_ptr after_flag_set = code->cur + 1;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1286 jcc(code, CC_Z, code->cur + 2);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1287 set_flag(opts, 0, FLAG_Z);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1288 *after_flag_set = code->cur - (after_flag_set+1);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1289 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1290 }
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1291 if (inst->op != M68K_CMP) {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1292 m68k_save_result(inst, opts);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1293 }
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1294 }
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1295
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1296 void translate_m68k_cmp(m68k_options * opts, m68kinst * inst)
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1297 {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1298 code_info *code = &opts->gen.code;
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1299 uint8_t size = inst->extra.size;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1300 host_ea src_op, dst_op;
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1301 translate_m68k_op(inst, &src_op, opts, 0);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1302 if (inst->dst.addr_mode == MODE_AREG_POSTINC) {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1303 push_r(code, opts->gen.scratch1);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1304 translate_m68k_op(inst, &dst_op, opts, 1);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1305 pop_r(code, opts->gen.scratch2);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1306 src_op.base = opts->gen.scratch2;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1307 } else {
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1308 translate_m68k_op(inst, &dst_op, opts, 1);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1309 if (inst->dst.addr_mode == MODE_AREG && size == OPSIZE_WORD) {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1310 size = OPSIZE_LONG;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1311 }
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1312 }
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1313 translate_m68k_arith(opts, inst, N\|Z\|V\|C, &src_op, &dst_op);
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1314 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1315
837 f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1316 void translate_m68k_tas(m68k_options opts, m68kinst inst)
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1317 {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1318 code_info *code = &opts->gen.code;
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1319 host_ea op;
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1320 translate_m68k_op(inst, &op, opts, 1);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1321 if (op.mode == MODE_REG_DIRECT) {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1322 cmp_ir(code, 0, op.base, SZ_B);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1323 } else {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1324 cmp_irdisp(code, 0, op.base, op.disp, SZ_B);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1325 }
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1326 update_flags(opts, N\|Z\|V0\|C0);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1327 if (inst->dst.addr_mode == MODE_REG) {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1328 cycles(&opts->gen, BUS);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1329 if (op.mode == MODE_REG_DIRECT) {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1330 bts_ir(code, 7, op.base, SZ_B);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1331 } else {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1332 bts_irdisp(code, 7, op.base, op.disp, SZ_B);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1333 }
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1334 } else {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1335 if (opts->gen.flags & M68K_OPT_BROKEN_READ_MODIFY) {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1336 //2 cycles for processing
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1337 //4 for failed writeback
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1338 //4 for prefetch
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1339 cycles(&opts->gen, BUS * 2 + 2);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1340 } else {
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1341 cycles(&opts->gen, 2);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1342 bts_ir(code, 7, op.base, SZ_B);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1343 m68k_save_result(inst, opts);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1344 cycles(&opts->gen, BUS);
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1345 }
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1346 }
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1347 }
f2cd380adebe Implement TAS Michael Pavone <pavone@retrodev.com> parents: 834 diff changeset	1348
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1349 void op_r(code_info code, m68kinst inst, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1350 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1351 switch(inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1352 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1353 case M68K_NEG: neg_r(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1354 case M68K_NOT: not_r(code, dst, size); cmp_ir(code, 0, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1355 case M68K_ROL: rol_clr(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1356 case M68K_ROR: ror_clr(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1357 case M68K_ROXL: rcl_clr(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1358 case M68K_ROXR: rcr_clr(code, dst, size); break;
578 ec1365fb2954 Use translate_m68k_unary for SWAP in 68K core Michael Pavone <pavone@retrodev.com> parents: 577 diff changeset	1359 case M68K_SWAP: rol_ir(code, 16, dst, SZ_D); cmp_ir(code, 0, dst, SZ_D); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1360 case M68K_TST: cmp_ir(code, 0, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1361 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1362 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1363
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1364 void op_rdisp(code_info code, m68kinst inst, uint8_t dst, int32_t disp, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1365 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1366 switch(inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1367 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1368 case M68K_NEG: neg_rdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1369 case M68K_NOT: not_rdisp(code, dst, disp, size); cmp_irdisp(code, 0, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1370 case M68K_ROL: rol_clrdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1371 case M68K_ROR: ror_clrdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1372 case M68K_ROXL: rcl_clrdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1373 case M68K_ROXR: rcr_clrdisp(code, dst, disp, size); break;
578 ec1365fb2954 Use translate_m68k_unary for SWAP in 68K core Michael Pavone <pavone@retrodev.com> parents: 577 diff changeset	1374 case M68K_SWAP: rol_irdisp(code, 16, dst, disp, SZ_D); cmp_irdisp(code, 0, dst, disp, SZ_D); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1375 case M68K_TST: cmp_irdisp(code, 0, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1376 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1377 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1378
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1379 void translate_m68k_unary(m68k_options opts, m68kinst inst, uint32_t flag_mask, host_ea *dst_op)
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1380 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1381 code_info *code = &opts->gen.code;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1382 cycles(&opts->gen, BUS);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1383 if (dst_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1384 op_r(code, inst, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1385 } else {
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1386 op_rdisp(code, inst, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1387 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1388 update_flags(opts, flag_mask);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1389 m68k_save_result(inst, opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1390 }
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1391
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1392 void translate_m68k_abcd_sbcd(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1393 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1394 code_info *code = &opts->gen.code;
834 65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1395 if (inst->op == M68K_NBCD) {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1396 if (dst_op->base != opts->gen.scratch2) {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1397 if (dst_op->mode == MODE_REG_DIRECT) {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1398 mov_rr(code, dst_op->base, opts->gen.scratch2, SZ_B);
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1399 } else {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1400 mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_B);
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1401 }
208 3457dc6fd558 Tweaks to make blastem compatible with m68k-tester Mike Pavone <pavone@retrodev.com> parents: 207 diff changeset	1402 }
834 65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1403 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_B);
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1404 } else {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1405 if (src_op->base != opts->gen.scratch2) {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1406 if (src_op->mode == MODE_REG_DIRECT) {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1407 mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B);
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1408 } else {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1409 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B);
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1410 }
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1411 }
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1412 if (dst_op->base != opts->gen.scratch1) {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1413 if (dst_op->mode == MODE_REG_DIRECT) {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1414 mov_rr(code, dst_op->base, opts->gen.scratch1, SZ_B);
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1415 } else {
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1416 mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, SZ_B);
65f9041b5f17 Implemented nbcd Michael Pavone <pavone@retrodev.com> parents: 833 diff changeset	1417 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1418 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1419 }
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1420 uint8_t other_reg;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1421 //WARNING: This may need adjustment if register assignments change
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1422 if (opts->gen.scratch2 > RBX) {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1423 other_reg = RAX;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1424 xchg_rr(code, opts->gen.scratch2, RAX, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1425 } else {
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1426 other_reg = opts->gen.scratch2;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1427 }
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1428 mov_rr(code, opts->gen.scratch1, opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1429 mov_rr(code, other_reg, other_reg + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1430 and_ir(code, 0xF, opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1431 and_ir(code, 0xF, other_reg + (AH-RAX), SZ_B);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1432 //do op on low nibble so we can determine if an adjustment is necessary
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1433 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1434 if (inst->op == M68K_ABCD) {
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1435 adc_rr(code, other_reg + (AH-RAX), opts->gen.scratch1 + (AH-RAX), SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1436 } else {
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1437 sbb_rr(code, other_reg + (AH-RAX), opts->gen.scratch1 + (AH-RAX), SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1438 }
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1439 cmp_ir(code, 0xA, opts->gen.scratch1 + (AH-RAX), SZ_B);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1440 mov_ir(code, 0xA0, other_reg + (AH-RAX), SZ_B);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1441 code_ptr no_adjust = code->cur+1;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1442 //add correction factor if necessary
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1443 jcc(code, CC_B, no_adjust);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1444 mov_ir(code, 6, opts->gen.scratch1 + (AH-RAX), SZ_B);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1445 mov_ir(code, inst->op == M68K_ABCD ? 0x9A : 0xA6, other_reg + (AH-RAX), SZ_B);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1446 code_ptr after_adjust = code->cur+1;
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1447 jmp(code, after_adjust);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1448
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1449 *no_adjust = code->cur - (no_adjust+1);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1450 xor_rr(code, opts->gen.scratch1 + (AH-RAX), opts->gen.scratch1 + (AH-RAX), SZ_B);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1451 *after_adjust = code->cur - (after_adjust+1);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1452
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1453 //do op on full byte
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1454 flag_to_carry(opts, FLAG_X);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1455 if (inst->op == M68K_ABCD) {
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1456 adc_rr(code, other_reg, opts->gen.scratch1, SZ_B);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1457 } else {
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1458 sbb_rr(code, other_reg, opts->gen.scratch1, SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1459 }
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1460 set_flag(opts, 0, FLAG_C);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1461 //determine if we need a correction on the upper nibble
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1462 code_ptr def_adjust = code->cur+1;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1463 jcc(code, CC_C, def_adjust);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1464 cmp_rr(code, other_reg + (AH-RAX), opts->gen.scratch1, SZ_B);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1465 no_adjust = code->cur+1;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1466 jcc(code, CC_B, no_adjust);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1467 *def_adjust = code->cur - (def_adjust + 1);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1468 set_flag(opts, 1, FLAG_C);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1469 or_ir(code, 0x60, opts->gen.scratch1 + (AH-RAX), SZ_B);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1470 *no_adjust = code->cur - (no_adjust+1);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1471 if (inst->op == M68K_ABCD) {
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1472 add_rr(code, opts->gen.scratch1 + (AH-RAX), opts->gen.scratch1, SZ_B);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1473 } else {
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1474 sub_rr(code, opts->gen.scratch1 + (AH-RAX), opts->gen.scratch1, SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1475 }
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1476 code_ptr no_ensure_carry = code->cur+1;
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1477 jcc(code, CC_NC, no_ensure_carry);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1478 set_flag(opts, 1, FLAG_C);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1479 *no_ensure_carry = code->cur - (no_ensure_carry+1);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1480 //restore RAX if necessary
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1481 if (opts->gen.scratch2 > RBX) {
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1482 mov_rr(code, opts->gen.scratch2, RAX, SZ_D);
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1483 }
841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1484 //V flag is set based on the result of the addition/subtraction of the
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1485 //result and the correction factor
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1486 set_flag_cond(opts, CC_O, FLAG_V);
833 841e44c5af83 Fix for abcd/sbcd. Hopefully got it 100% right this time. Michael Pavone <pavone@retrodev.com> parents: 792 diff changeset	1487
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1488 flag_to_flag(opts, FLAG_C, FLAG_X);
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 620 diff changeset	1489
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1490 cmp_ir(code, 0, opts->gen.scratch1, SZ_B);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1491 set_flag_cond(opts, CC_S, FLAG_N);
733 fbda8e865dae Fix crash bug in 32-bit build for certain secnarios with bcd instructions Michael Pavone <pavone@retrodev.com> parents: 732 diff changeset	1492 code_ptr no_setz = code->cur+1;
fbda8e865dae Fix crash bug in 32-bit build for certain secnarios with bcd instructions Michael Pavone <pavone@retrodev.com> parents: 732 diff changeset	1493 jcc(code, CC_Z, no_setz);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1494 set_flag(opts, 0, FLAG_Z);
733 fbda8e865dae Fix crash bug in 32-bit build for certain secnarios with bcd instructions Michael Pavone <pavone@retrodev.com> parents: 732 diff changeset	1495 *no_setz = code->cur - (no_setz + 1);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1496 if (dst_op->base != opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1497 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1498 mov_rr(code, opts->gen.scratch1, dst_op->base, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1499 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1500 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_B);
73 8da611e69b32 Implement a couple of supervisor instructions Mike Pavone <pavone@retrodev.com> parents: 71 diff changeset	1501 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1502 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1503 m68k_save_result(inst, opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1504 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1505
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1506 void translate_m68k_sl(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1507 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1508 translate_shift(opts, inst, src_op, dst_op, shl_ir, shl_irdisp, shl_clr, shl_clrdisp, shr_ir, shr_irdisp);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1509 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1510
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1511 void translate_m68k_asr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1512 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1513 translate_shift(opts, inst, src_op, dst_op, sar_ir, sar_irdisp, sar_clr, sar_clrdisp, NULL, NULL);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1514 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1515
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1516 void translate_m68k_lsr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1517 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1518 translate_shift(opts, inst, src_op, dst_op, shr_ir, shr_irdisp, shr_clr, shr_clrdisp, shl_ir, shl_irdisp);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1519 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1520
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1521 void translate_m68k_bit(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1522 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1523 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1524 cycles(&opts->gen, inst->extra.size == OPSIZE_BYTE ? 4 : (
457 6a315728fede Fix bit instruction timing Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1525 inst->op == M68K_BTST ? 6 : (inst->op == M68K_BCLR ? 10 : 8))
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1526 );
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1527 if (src_op->mode == MODE_IMMED) {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1528 if (inst->extra.size == OPSIZE_BYTE) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1529 src_op->disp &= 0x7;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1530 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1531 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1532 op_ir(code, inst, src_op->disp, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1533 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1534 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1535 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1536 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1537 if (src_op->mode == MODE_REG_DISPLACE8 \|\| (inst->dst.addr_mode != MODE_REG && src_op->base != opts->gen.scratch1 && src_op->base != opts->gen.scratch2)) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1538 if (dst_op->base == opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1539 push_r(code, opts->gen.scratch2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1540 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1541 mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B);
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	1542 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1543 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B);
154 4791c0204410 Small fix for bit instructions Mike Pavone <pavone@retrodev.com> parents: 152 diff changeset	1544 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1545 src_op->base = opts->gen.scratch2;
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	1546 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1547 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1548 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1549 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1550 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1551 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1552 src_op->base = opts->gen.scratch1;
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	1553 }
226 28a6697e847b Implement CHK instruction (not fully tested). Mike Pavone <pavone@retrodev.com> parents: 225 diff changeset	1554 }
221 71f6b76639db Fix modulo on bit operations with a memory destination Mike Pavone <pavone@retrodev.com> parents: 219 diff changeset	1555 uint8_t size = inst->extra.size;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1556 if (dst_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1557 if (src_op->base != opts->gen.scratch1 && src_op->base != opts->gen.scratch2) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1558 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1559 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1560 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1561 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1562 src_op->mode = MODE_REG_DIRECT;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1563 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1564 src_op->base = opts->gen.scratch1;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1565 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1566 //b### with register destination is modulo 32
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1567 //x86 with a memory destination isn't modulo anything
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1568 //so use an and here to force the value to be modulo 32
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1569 and_ir(code, 31, opts->gen.scratch1, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1570 } else if(inst->dst.addr_mode != MODE_REG) {
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1571 //b### with memory destination is modulo 8
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1572 //x86-64 doesn't support 8-bit bit operations
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1573 //so we fake it by forcing the bit number to be modulo 8
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1574 and_ir(code, 7, src_op->base, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1575 size = SZ_D;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1576 }
976 8cdd4ddedd9a Properly imlement btst with an immediate destination. Fixes a crash in NHL 95. Michael Pavone <pavone@retrodev.com> parents: 908 diff changeset	1577 if (dst_op->mode == MODE_IMMED) {
8cdd4ddedd9a Properly imlement btst with an immediate destination. Fixes a crash in NHL 95. Michael Pavone <pavone@retrodev.com> parents: 908 diff changeset	1578 dst_op->base = src_op->base == opts->gen.scratch1 ? opts->gen.scratch2 : opts->gen.scratch1;
8cdd4ddedd9a Properly imlement btst with an immediate destination. Fixes a crash in NHL 95. Michael Pavone <pavone@retrodev.com> parents: 908 diff changeset	1579 mov_ir(code, dst_op->disp, dst_op->base, SZ_B);
8cdd4ddedd9a Properly imlement btst with an immediate destination. Fixes a crash in NHL 95. Michael Pavone <pavone@retrodev.com> parents: 908 diff changeset	1580 dst_op->mode = MODE_REG_DIRECT;
8cdd4ddedd9a Properly imlement btst with an immediate destination. Fixes a crash in NHL 95. Michael Pavone <pavone@retrodev.com> parents: 908 diff changeset	1581 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1582 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1583 op_rr(code, inst, src_op->base, dst_op->base, size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1584 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1585 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1586 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1587 if (src_op->base == opts->gen.scratch2) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1588 pop_r(code, opts->gen.scratch2);
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1589 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1590 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1591 //x86 sets the carry flag to the value of the bit tested
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1592 //68K sets the zero flag to the complement of the bit tested
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1593 set_flag_cond(opts, CC_NC, FLAG_Z);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1594 if (inst->op != M68K_BTST) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1595 m68k_save_result(inst, opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1596 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1597 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1598
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1599 void translate_m68k_chk(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
226 28a6697e847b Implement CHK instruction (not fully tested). Mike Pavone <pavone@retrodev.com> parents: 225 diff changeset	1600 {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1601 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1602 cycles(&opts->gen, 6);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1603 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1604 cmp_ir(code, 0, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1605 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1606 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1607 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1608 uint32_t isize;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1609 switch(inst->src.addr_mode)
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1610 {
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1611 case MODE_AREG_DISPLACE:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1612 case MODE_AREG_INDEX_DISP8:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1613 case MODE_ABSOLUTE_SHORT:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1614 case MODE_PC_INDEX_DISP8:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1615 case MODE_PC_DISPLACE:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1616 case MODE_IMMEDIATE:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1617 isize = 4;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1618 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1619 case MODE_ABSOLUTE:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1620 isize = 6;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1621 break;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1622 default:
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1623 isize = 2;
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1624 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1625 //make sure we won't start a new chunk in the middle of these branches
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1626 check_alloc_code(code, MAX_INST_LEN * 11);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1627 code_ptr passed = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1628 jcc(code, CC_GE, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1629 set_flag(opts, 1, FLAG_N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1630 mov_ir(code, VECTOR_CHK, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1631 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1632 jmp(code, opts->trap);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1633 *passed = code->cur - (passed+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1634 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1635 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1636 cmp_rr(code, src_op->base, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1637 } else if(src_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1638 cmp_rdispr(code, src_op->base, src_op->disp, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1639 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1640 cmp_ir(code, src_op->disp, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1641 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1642 } else if(dst_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1643 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1644 cmp_rrdisp(code, src_op->base, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1645 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1646 cmp_irdisp(code, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
171 f03db3db48fb Implement EORI CCR/SR Mike Pavone <pavone@retrodev.com> parents: 170 diff changeset	1647 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1648 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1649 passed = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1650 jcc(code, CC_LE, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1651 set_flag(opts, 0, FLAG_N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1652 mov_ir(code, VECTOR_CHK, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1653 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1654 jmp(code, opts->trap);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1655 *passed = code->cur - (passed+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1656 cycles(&opts->gen, 4);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1657 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1658
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1659 void translate_m68k_div(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1660 {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1661 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1662 check_alloc_code(code, MAX_NATIVE_SIZE);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1663 //TODO: cycle exact division
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1664 cycles(&opts->gen, inst->op == M68K_DIVS ? 158 : 140);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1665 set_flag(opts, 0, FLAG_C);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1666 push_r(code, RDX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1667 push_r(code, RAX);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	1668 uint32_t tmp_stack_off = code->stack_off;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1669 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1670 mov_rr(code, dst_op->base, RAX, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1671 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1672 mov_rdispr(code, dst_op->base, dst_op->disp, RAX, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1673 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1674 if (src_op->mode == MODE_IMMED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1675 mov_ir(code, (src_op->disp & 0x8000) && inst->op == M68K_DIVS ? src_op->disp \| 0xFFFF0000 : src_op->disp, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1676 } else if (src_op->mode == MODE_REG_DIRECT) {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1677 if (inst->op == M68K_DIVS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1678 movsx_rr(code, src_op->base, opts->gen.scratch2, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1679 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1680 movzx_rr(code, src_op->base, opts->gen.scratch2, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1681 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1682 } else if (src_op->mode == MODE_REG_DISPLACE8) {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1683 if (inst->op == M68K_DIVS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1684 movsx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1685 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1686 movzx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	1687 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1688 }
611 744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1689 uint32_t isize = 2;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1690 switch(inst->src.addr_mode)
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1691 {
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1692 case MODE_AREG_DISPLACE:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1693 case MODE_AREG_INDEX_DISP8:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1694 case MODE_ABSOLUTE_SHORT:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1695 case MODE_PC_INDEX_DISP8:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1696 case MODE_IMMEDIATE:
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 620 diff changeset	1697 isize = 4;
611 744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1698 break;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1699 case MODE_ABSOLUTE:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1700 isize = 6;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1701 break;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1702 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1703 cmp_ir(code, 0, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1704 check_alloc_code(code, 6*MAX_INST_LEN);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1705 code_ptr not_zero = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1706 jcc(code, CC_NZ, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1707 pop_r(code, RAX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1708 pop_r(code, RDX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1709 mov_ir(code, VECTOR_INT_DIV_ZERO, opts->gen.scratch2, SZ_D);
611 744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1710 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1711 jmp(code, opts->trap);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	1712
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	1713 code->stack_off = tmp_stack_off;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1714 *not_zero = code->cur - (not_zero+1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1715 if (inst->op == M68K_DIVS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1716 cdq(code);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1717 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1718 xor_rr(code, RDX, RDX, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1719 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1720 if (inst->op == M68K_DIVS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1721 idiv_r(code, opts->gen.scratch2, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1722 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1723 div_r(code, opts->gen.scratch2, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1724 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1725 code_ptr skip_sec_check, norm_off;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1726 if (inst->op == M68K_DIVS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1727 cmp_ir(code, 0x8000, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1728 skip_sec_check = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1729 jcc(code, CC_GE, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1730 cmp_ir(code, -0x8000, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1731 norm_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1732 jcc(code, CC_L, code->cur + 2);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1733 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1734 cmp_ir(code, 0x10000, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1735 norm_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1736 jcc(code, CC_NC, code->cur + 2);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1737 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1738 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1739 mov_rr(code, RDX, dst_op->base, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1740 shl_ir(code, 16, dst_op->base, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1741 mov_rr(code, RAX, dst_op->base, SZ_W);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1742 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1743 mov_rrdisp(code, RDX, dst_op->base, dst_op->disp, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1744 shl_irdisp(code, 16, dst_op->base, dst_op->disp, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1745 mov_rrdisp(code, RAX, dst_op->base, dst_op->disp, SZ_W);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1746 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1747 cmp_ir(code, 0, RAX, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1748 pop_r(code, RAX);
732 61467483eb31 Fix div instruction when dest is d0 in 32-bit build Michael Pavone <pavone@retrodev.com> parents: 727 diff changeset	1749 if (dst_op->base == RDX) {
61467483eb31 Fix div instruction when dest is d0 in 32-bit build Michael Pavone <pavone@retrodev.com> parents: 727 diff changeset	1750 update_flags(opts, V0\|Z\|N);
61467483eb31 Fix div instruction when dest is d0 in 32-bit build Michael Pavone <pavone@retrodev.com> parents: 727 diff changeset	1751 add_ir(code, sizeof(void *), RSP, SZ_D);
61467483eb31 Fix div instruction when dest is d0 in 32-bit build Michael Pavone <pavone@retrodev.com> parents: 727 diff changeset	1752 } else {
61467483eb31 Fix div instruction when dest is d0 in 32-bit build Michael Pavone <pavone@retrodev.com> parents: 727 diff changeset	1753 pop_r(code, RDX);
61467483eb31 Fix div instruction when dest is d0 in 32-bit build Michael Pavone <pavone@retrodev.com> parents: 727 diff changeset	1754 update_flags(opts, V0\|Z\|N);
61467483eb31 Fix div instruction when dest is d0 in 32-bit build Michael Pavone <pavone@retrodev.com> parents: 727 diff changeset	1755 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1756 code_ptr end_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1757 jmp(code, code->cur + 2);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	1758 code->stack_off = tmp_stack_off;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1759 *norm_off = code->cur - (norm_off + 1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1760 if (inst->op == M68K_DIVS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1761 *skip_sec_check = code->cur - (skip_sec_check+1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1762 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1763 pop_r(code, RAX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1764 pop_r(code, RDX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1765 set_flag(opts, 1, FLAG_V);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1766 *end_off = code->cur - (end_off + 1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1767 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1768
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1769 void translate_m68k_exg(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1770 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1771 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1772 cycles(&opts->gen, 6);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1773 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1774 mov_rr(code, dst_op->base, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1775 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1776 mov_rr(code, src_op->base, dst_op->base, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1777 mov_rr(code, opts->gen.scratch2, src_op->base, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1778 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1779 mov_rdispr(code, src_op->base, src_op->disp, dst_op->base, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1780 mov_rrdisp(code, opts->gen.scratch2, src_op->base, src_op->disp, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1781 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1782 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1783 mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1784 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1785 mov_rrdisp(code, src_op->base, dst_op->base, dst_op->disp, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1786 mov_rr(code, opts->gen.scratch2, src_op->base, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1787 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1788 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1789 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1790 mov_rrdisp(code, opts->gen.scratch2, src_op->base, src_op->disp, SZ_D);
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1791 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1792 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1793 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1794
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1795 void translate_m68k_mul(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1796 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1797 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1798 cycles(&opts->gen, 70); //TODO: Calculate the actual value based on the value of the <ea> parameter
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1799 if (src_op->mode == MODE_IMMED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1800 mov_ir(code, inst->op == M68K_MULU ? (src_op->disp & 0xFFFF) : ((src_op->disp & 0x8000) ? src_op->disp \| 0xFFFF0000 : src_op->disp), opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1801 } else if (src_op->mode == MODE_REG_DIRECT) {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1802 if (inst->op == M68K_MULS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1803 movsx_rr(code, src_op->base, opts->gen.scratch1, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1804 } else {
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1805 movzx_rr(code, src_op->base, opts->gen.scratch1, SZ_W, SZ_D);
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1806 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1807 } else {
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1808 if (inst->op == M68K_MULS) {
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 561 667 diff changeset	1809 movsx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1810 } else {
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 561 667 diff changeset	1811 movzx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W, SZ_D);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1812 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1813 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1814 uint8_t dst_reg;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1815 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1816 dst_reg = dst_op->base;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1817 if (inst->op == M68K_MULS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1818 movsx_rr(code, dst_reg, dst_reg, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1819 } else {
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 561 667 diff changeset	1820 movzx_rr(code, dst_reg, dst_reg, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1821 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1822 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1823 dst_reg = opts->gen.scratch2;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1824 if (inst->op == M68K_MULS) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1825 movsx_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1826 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1827 movzx_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1828 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1829 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1830 imul_rr(code, opts->gen.scratch1, dst_reg, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1831 if (dst_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1832 mov_rrdisp(code, dst_reg, dst_op->base, dst_op->disp, SZ_D);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1833 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1834 cmp_ir(code, 0, dst_reg, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1835 update_flags(opts, N\|Z\|V0\|C0);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1836 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1837
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1838 void translate_m68k_negx(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1839 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1840 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1841 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1842 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1843 if (dst_op->base == opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1844 push_r(code, opts->gen.scratch2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1845 xor_rr(code, opts->gen.scratch2, opts->gen.scratch2, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1846 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1847 sbb_rr(code, dst_op->base, opts->gen.scratch2, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1848 mov_rr(code, opts->gen.scratch2, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1849 pop_r(code, opts->gen.scratch2);
173 47b2796fb277 Implement negx Mike Pavone <pavone@retrodev.com> parents: 172 diff changeset	1850 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1851 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1852 flag_to_carry(opts, FLAG_X);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1853 sbb_rr(code, dst_op->base, opts->gen.scratch1, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1854 mov_rr(code, opts->gen.scratch1, dst_op->base, inst->extra.size);
106 1eba2b9455f8 Implement ORI to CCR/SR Mike Pavone <pavone@retrodev.com> parents: 105 diff changeset	1855 }
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1856 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1857 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1858 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1859 sbb_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1860 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1861 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1862 set_flag_cond(opts, CC_C, FLAG_C);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1863 code_ptr after_flag_set = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1864 jcc(code, CC_Z, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1865 set_flag(opts, 0, FLAG_Z);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1866 *after_flag_set = code->cur - (after_flag_set+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1867 set_flag_cond(opts, CC_S, FLAG_N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1868 set_flag_cond(opts, CC_O, FLAG_V);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1869 if (opts->flag_regs[FLAG_C] >= 0) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1870 flag_to_flag(opts, FLAG_C, FLAG_X);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1871 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1872 set_flag_cond(opts, CC_C, FLAG_X);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1873 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1874 m68k_save_result(inst, opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1875 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1876
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1877 void translate_m68k_rot(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1878 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1879 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1880 int32_t init_flags = C\|V0;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1881 if (inst->src.addr_mode == MODE_UNUSED) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1882 cycles(&opts->gen, BUS);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1883 //Memory rotate
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1884 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1885 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1886 init_flags \|= X;
106 1eba2b9455f8 Implement ORI to CCR/SR Mike Pavone <pavone@retrodev.com> parents: 105 diff changeset	1887 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1888 op_ir(code, inst, 1, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1889 update_flags(opts, init_flags);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1890 cmp_ir(code, 0, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1891 update_flags(opts, Z\|N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1892 m68k_save_result(inst, opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1893 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1894 if (src_op->mode == MODE_IMMED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1895 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 8 : 6) + src_op->disp*2);
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1896 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1897 flag_to_carry(opts, FLAG_X);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1898 init_flags \|= X;
122 0a6da6c7c463 Implemented ROL and ROR Mike Pavone <pavone@retrodev.com> parents: 121 diff changeset	1899 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1900 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1901 op_ir(code, inst, src_op->disp, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1902 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1903 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1904 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1905 update_flags(opts, init_flags);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1906 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1907 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1908 if (src_op->base != opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1909 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1910 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1911 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1912 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1913 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1914 and_ir(code, 63, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1915 code_ptr zero_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1916 jcc(code, CC_Z, code->cur + 2);
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1917 //add 2 cycles for every bit shifted
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1918 mov_ir(code, 2 * opts->gen.clock_divider, opts->gen.scratch2, SZ_D);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1919 imul_rr(code, RCX, opts->gen.scratch2, SZ_D);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	1920 add_rr(code, opts->gen.scratch2, opts->gen.cycles, SZ_D);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1921 cmp_ir(code, 32, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1922 code_ptr norm_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1923 jcc(code, CC_L, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1924 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1925 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1926 init_flags \|= X;
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1927 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1928 sub_ir(code, 32, opts->gen.scratch1, SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1929 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1930 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1931 op_ir(code, inst, 31, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1932 op_ir(code, inst, 1, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1933 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1934 op_irdisp(code, inst, 31, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1935 op_irdisp(code, inst, 1, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1936 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1937
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1938 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1939 set_flag_cond(opts, CC_C, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1940 sub_ir(code, 32, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1941 *norm_off = code->cur - (norm_off+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1942 flag_to_carry(opts, FLAG_X);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1943 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1944 *norm_off = code->cur - (norm_off+1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1945 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1946 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1947 op_r(code, inst, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1948 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1949 op_rdisp(code, inst, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1950 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1951 update_flags(opts, init_flags);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1952 code_ptr end_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1953 jmp(code, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1954 *zero_off = code->cur - (zero_off+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1955 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1956 //Carry flag is set to X flag when count is 0, this is different from ROR/ROL
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1957 flag_to_flag(opts, FLAG_X, FLAG_C);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1958 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1959 set_flag(opts, 0, FLAG_C);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1960 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1961 *end_off = code->cur - (end_off+1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1962 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1963 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1964 cmp_ir(code, 0, dst_op->base, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1965 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1966 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1967 }
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 561 667 diff changeset	1968 update_flags(opts, Z\|N);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1969 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1970 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1971
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1972 #define BIT_SUPERVISOR 5
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1973
990 33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1974 void m68k_trap_if_not_supervisor(m68k_options opts, m68kinst inst)
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1975 {
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1976 code_info *code = &opts->gen.code;
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1977 //check supervisor bit in SR and trap if not in supervisor mode
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1978 bt_irdisp(code, BIT_SUPERVISOR, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1979 code_ptr in_sup_mode = code->cur + 1;
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1980 jcc(code, CC_C, code->cur + 2);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1981
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1982 ldi_native(opts, VECTOR_PRIV_VIOLATION, opts->gen.scratch2);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1983 ldi_native(opts, inst->address, opts->gen.scratch1);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1984 jmp(code, opts->trap);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1985
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1986 *in_sup_mode = code->cur - (in_sup_mode + 1);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1987 }
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1988
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1989 void translate_m68k_andi_ori_ccr_sr(m68k_options opts, m68kinst inst)
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1990 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1991 code_info *code = &opts->gen.code;
990 33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1992 if (inst->op == M68K_ANDI_SR \|\| inst->op == M68K_ORI_SR) {
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1993 m68k_trap_if_not_supervisor(opts, inst);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	1994 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1995 cycles(&opts->gen, 20);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1996 uint32_t flag_mask = 0;
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1997 uint32_t base_flag = inst->op == M68K_ANDI_SR \|\| inst->op == M68K_ANDI_CCR ? X0 : X1;
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1998 for (int i = 0; i < 5; i++)
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1999 {
757 483f7e7926a6 More clang warning cleanup Michael Pavone <pavone@retrodev.com> parents: 751 diff changeset	2000 if ((base_flag == X0) ^ ((inst->src.params.immed & 1 << i) > 0))
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2001 {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2002 flag_mask \|= base_flag << ((4 - i) * 3);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2003 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2004 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2005 update_flags(opts, flag_mask);
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2006 if (inst->op == M68K_ANDI_SR \|\| inst->op == M68K_ORI_SR) {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2007 if (inst->op == M68K_ANDI_SR) {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2008 and_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2009 } else {
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2010 or_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2011 }
605 49d9928353be Fix a bug in ori to SR that was swapping USP and SSP inappropriately Michael Pavone <pavone@retrodev.com> parents: 601 diff changeset	2012 if (inst->op == M68K_ANDI_SR && !(inst->src.params.immed & (1 << (BIT_SUPERVISOR + 8)))) {
446 1e828ed04a7c Implement 68K stop instruction Mike Pavone <pavone@retrodev.com> parents: 443 diff changeset	2013 //leave supervisor mode
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2014 swap_ssp_usp(opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2015 }
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2016 if ((inst->op == M68K_ANDI_SR && (inst->src.params.immed & 0x700) != 0x700)
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	2017 \|\| (inst->op == M68K_ORI_SR && inst->src.params.immed & 0x700)) {
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2018 if (inst->op == M68K_ANDI_SR) {
98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2019 //set int pending flag in case we trigger an interrupt as a result of the mask change
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2020 mov_irdisp(code, INT_PENDING_SR_CHANGE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2021 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2022 call(code, opts->do_sync);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2023 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2024 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2025 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2026
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2027 void translate_m68k_eori_ccr_sr(m68k_options opts, m68kinst inst)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2028 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2029 code_info *code = &opts->gen.code;
990 33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	2030 if (inst->op == M68K_EORI_SR) {
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	2031 m68k_trap_if_not_supervisor(opts, inst);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	2032 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2033 cycles(&opts->gen, 20);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2034 if (inst->src.params.immed & 0x1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2035 xor_flag(opts, 1, FLAG_C);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2036 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2037 if (inst->src.params.immed & 0x2) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2038 xor_flag(opts, 1, FLAG_V);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2039 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2040 if (inst->src.params.immed & 0x4) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2041 xor_flag(opts, 1, FLAG_Z);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2042 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2043 if (inst->src.params.immed & 0x8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2044 xor_flag(opts, 1, FLAG_N);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2045 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2046 if (inst->src.params.immed & 0x10) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2047 xor_flag(opts, 1, FLAG_X);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2048 }
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2049 if (inst->op == M68K_EORI_SR) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2050 xor_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2051 if (inst->src.params.immed & 0x700) {
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2052 //set int pending flag in case we trigger an interrupt as a result of the mask change
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2053 mov_irdisp(code, INT_PENDING_SR_CHANGE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2054 call(code, opts->do_sync);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2055 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2056 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2057 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2058
586 aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2059 void set_all_flags(m68k_options *opts, uint8_t flags)
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2060 {
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2061 uint32_t flag_mask = flags & 0x10 ? X1 : X0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2062 flag_mask \|= flags & 0x8 ? N1 : N0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2063 flag_mask \|= flags & 0x4 ? Z1 : Z0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2064 flag_mask \|= flags & 0x2 ? V1 : V0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2065 flag_mask \|= flags & 0x1 ? C1 : C0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2066 update_flags(opts, flag_mask);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2067 }
586 aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2068
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2069 void translate_m68k_move_ccr_sr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2070 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2071 code_info *code = &opts->gen.code;
990 33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	2072 if (inst->op == M68K_MOVE_SR) {
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	2073 m68k_trap_if_not_supervisor(opts, inst);
33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	2074 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2075 if (src_op->mode == MODE_IMMED) {
586 aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2076 set_all_flags(opts, src_op->disp);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2077 if (inst->op == M68K_MOVE_SR) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2078 mov_irdisp(code, (src_op->disp >> 8), opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2079 if (!((inst->src.params.immed >> 8) & (1 << BIT_SUPERVISOR))) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2080 //leave supervisor mode
585 82aadd5d103a Use swap_ssp_usp in translate_m68k_move_ccr_sr Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	2081 swap_ssp_usp(opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2082 }
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2083 if (((src_op->disp >> 8) & 7) < 7) {
98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2084 //set int pending flag in case we trigger an interrupt as a result of the mask change
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2085 mov_irdisp(code, INT_PENDING_SR_CHANGE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2086 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2087 call(code, opts->do_sync);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2088 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2089 cycles(&opts->gen, 12);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2090 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2091 if (src_op->base != opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2092 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2093 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2094 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2095 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2096 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2097 }
698 0a86e81fa87d Fixed a missed call to do_sync when updating SR in 68K core Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	2098 if (inst->op == M68K_MOVE_SR) {
0a86e81fa87d Fixed a missed call to do_sync when updating SR in 68K core Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	2099 call(code, opts->set_sr);
0a86e81fa87d Fixed a missed call to do_sync when updating SR in 68K core Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	2100 call(code, opts->do_sync);
0a86e81fa87d Fixed a missed call to do_sync when updating SR in 68K core Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	2101 } else {
0a86e81fa87d Fixed a missed call to do_sync when updating SR in 68K core Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	2102 call(code, opts->set_ccr);
0a86e81fa87d Fixed a missed call to do_sync when updating SR in 68K core Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	2103 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2104 cycles(&opts->gen, 12);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2105 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2106 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2107
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2108 void translate_m68k_stop(m68k_options opts, m68kinst inst)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2109 {
990 33a46d35b913 Implement privelege violation exceptions Michael Pavone <pavone@retrodev.com> parents: 989 diff changeset	2110 m68k_trap_if_not_supervisor(opts, inst);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2111 //manual says 4 cycles, but it has to be at least 8 since it's a 2-word instruction
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2112 //possibly even 12 since that's how long MOVE to SR takes
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2113 //On further thought prefetch + the fact that this stops the CPU may make
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2114 //Motorola's accounting make sense here
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2115 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2116 cycles(&opts->gen, BUS*2);
586 aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2117 set_all_flags(opts, inst->src.params.immed);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2118 mov_irdisp(code, (inst->src.params.immed >> 8), opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2119 if (!((inst->src.params.immed >> 8) & (1 << BIT_SUPERVISOR))) {
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2120 //leave supervisor mode
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2121 swap_ssp_usp(opts);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2122 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2123 code_ptr loop_top = code->cur;
985 751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2124 call(code, opts->do_sync);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2125 cmp_rr(code, opts->gen.limit, opts->gen.cycles, SZ_D);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2126 code_ptr normal_cycle_up = code->cur + 1;
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2127 jcc(code, CC_A, code->cur + 2);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2128 cycles(&opts->gen, BUS);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2129 code_ptr after_cycle_up = code->cur + 1;
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2130 jmp(code, code->cur + 2);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2131 *normal_cycle_up = code->cur - (normal_cycle_up + 1);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2132 mov_rr(code, opts->gen.limit, opts->gen.cycles, SZ_D);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2133 *after_cycle_up = code->cur - (after_cycle_up+1);
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2134 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_cycle), opts->gen.cycles, SZ_D);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2135 jcc(code, CC_C, loop_top);
985 751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2136 //set int pending flag so interrupt fires immediately after stop is done
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2137 mov_irdisp(code, INT_PENDING_SR_CHANGE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2138 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2139
839 4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2140 void translate_m68k_trapv(m68k_options opts, m68kinst inst)
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2141 {
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2142 code_info *code = &opts->gen.code;
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2143 cycles(&opts->gen, BUS);
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2144 flag_to_carry(opts, FLAG_V);
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2145 code_ptr no_trap = code->cur + 1;
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2146 jcc(code, CC_NC, no_trap);
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2147 ldi_native(opts, VECTOR_TRAPV, opts->gen.scratch2);
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2148 ldi_native(opts, inst->address+2, opts->gen.scratch1);
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2149 jmp(code, opts->trap);
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2150 *no_trap = code->cur - (no_trap + 1);
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2151 }
4556818b6847 Implement TRAPV Michael Pavone <pavone@retrodev.com> parents: 837 diff changeset	2152
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2153 void translate_m68k_odd(m68k_options opts, m68kinst inst)
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2154 {
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2155 code_info *code = &opts->gen.code;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2156 //swap USP and SSP if not already in supervisor mode
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2157 check_user_mode_swap_ssp_usp(opts);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2158 //save PC
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2159 subi_areg(opts, 4, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2160 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2161 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, last_prefetch_address), opts->gen.scratch1, SZ_D);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2162 call(code, opts->write_32_lowfirst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2163 //save status register
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2164 subi_areg(opts, 2, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2165 call(code, opts->get_sr);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2166 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2167 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2168 //save instruction register
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2169 subi_areg(opts, 2, 7);
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2170 //calculate IR
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2171 push_r(code, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2172 call(code, opts->gen.save_context);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2173 call_args_abi(code, (code_ptr)m68k_get_ir, 1, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2174 mov_rr(code, RAX, opts->gen.scratch1, SZ_W);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2175 pop_r(code, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2176 push_r(code, RAX); //save it for use in the "info" word
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2177 call(code, opts->gen.load_context);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2178 //write it to the stack
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2179 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2180 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2181 //save access address
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2182 subi_areg(opts, 4, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2183 mov_ir(code, inst->address, opts->gen.scratch1, SZ_D);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2184 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2185 call(code, opts->write_32_lowfirst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2186 //save FC, I/N and R/W word'
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2187 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_W);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2188 //FC3 is basically the same as the supervisor bit
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2189 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, status), opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2190 shr_ir(code, 3, opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2191 and_ir(code, 4, opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2192 //set FC1 to one to indicate instruction fetch, and R/W to indicate read
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2193 or_ir(code, 0x12, opts->gen.scratch1, SZ_B);
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2194 //set undefined bits to IR value
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2195 pop_r(code, opts->gen.scratch2);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2196 and_ir(code, 0xFFE0, opts->gen.scratch2, SZ_W);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2197 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W);
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2198 subi_areg(opts, 2, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2199 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2200 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2201 //set supervisor bit
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2202 or_irdisp(code, 0x20, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2203 //load vector address
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2204 mov_ir(code, 4 * VECTOR_ADDRESS_ERROR, opts->gen.scratch1, SZ_D);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2205 call(code, opts->read_32);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2206 call(code, opts->native_addr_and_sync);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2207 cycles(&opts->gen, 18);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2208 jmp_r(code, opts->gen.scratch1);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2209 }
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2210
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2211 void translate_m68k_move_from_sr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2212 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2213 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2214 call(code, opts->get_sr);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2215 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2216 mov_rr(code, opts->gen.scratch1, dst_op->base, SZ_W);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2217 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2218 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_W);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2219 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2220 m68k_save_result(inst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2221 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2222
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2223 void translate_out_of_bounds(code_info *code)
319 0bcab0475a7f Port instruction retranslation improvements from Z80 core to M68K core Mike Pavone <pavone@retrodev.com> parents: 235 diff changeset	2224 {
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2225 xor_rr(code, RDI, RDI, SZ_D);
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2226 call_args(code, (code_ptr)exit, 1, RDI);
319 0bcab0475a7f Port instruction retranslation improvements from Z80 core to M68K core Mike Pavone <pavone@retrodev.com> parents: 235 diff changeset	2227 }
0bcab0475a7f Port instruction retranslation improvements from Z80 core to M68K core Mike Pavone <pavone@retrodev.com> parents: 235 diff changeset	2228
981 902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	2229 void m68k_set_last_prefetch(m68k_options *opts, uint32_t address)
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	2230 {
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	2231 mov_irdisp(&opts->gen.code, address, opts->gen.context_reg, offsetof(m68k_context, last_prefetch_address), SZ_D);
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	2232 }
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 979 diff changeset	2233
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2234 void nop_fill_or_jmp_next(code_info *code, code_ptr old_end, code_ptr next_inst)
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2235 {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2236 if (next_inst == old_end && next_inst - code->cur < 2) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2237 while (code->cur < old_end) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2238 *(code->cur++) = 0x90; //NOP
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2239 }
8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2240 } else {
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2241 jmp(code, next_inst);
193 c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2242 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2243 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2244
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2245 m68k_context * m68k_handle_code_write(uint32_t address, m68k_context * context)
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2246 {
985 751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2247 m68k_options * options = context->options;
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2248 //TODO: Modify gen_mem_fun so that it passes the raw address instead of the masked one, then remove the OR below
751280fb4494 Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	2249 uint32_t inst_start = get_instruction_start(options, context->native_code_map, address \| 0xE00000);
193 c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2250 if (inst_start) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2251 code_info *code = &options->gen.code;
726 7367b14ac01c Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96 Michael Pavone <pavone@retrodev.com> parents: 698 diff changeset	2252 code_ptr dst = get_native_address(context->options, inst_start);
902 6011409ded0d Fix a few lingering stack alignment rework bugs Michael Pavone <pavone@retrodev.com> parents: 894 diff changeset	2253 code_info orig = {dst, dst + 128, 0};
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2254 mov_ir(&orig, inst_start, options->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2255
543 915a1cb98bac Generate retrans_stub at runtime so it can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 542 diff changeset	2256 if (!options->retrans_stub) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2257 options->retrans_stub = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2258 call(code, options->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2259 push_r(code, options->gen.context_reg);
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2260 call_args(code,(code_ptr)m68k_retranslate_inst, 2, options->gen.scratch2, options->gen.context_reg);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2261 pop_r(code, options->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2262 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2263 call(code, options->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2264 jmp_r(code, options->gen.scratch1);
686 8cb61671777b Fix indentation that presumably got messed up in a merge Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	2265 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2266 jmp(&orig, options->retrans_stub);
193 c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2267 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2268 return context;
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2269 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2270
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2271 void insert_breakpoint(m68k_context * context, uint32_t address, code_ptr bp_handler)
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2272 {
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2273 static code_ptr bp_stub = NULL;
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	2274 m68k_options * opts = context->options;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2275 code_info native;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2276 native.cur = get_native_address_trans(context, address);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2277 native.last = native.cur + 128;
908 20e30ca7e8a2 Fix problem in 68K debugger caused by stack alignment change Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	2278 native.stack_off = 0;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2279 code_ptr start_native = native.cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2280 mov_ir(&native, address, opts->gen.scratch1, SZ_D);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2281 if (!bp_stub) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2282 code_info *code = &opts->gen.code;
654 98927f1b005b Fix some issues with 68K instruction retranslation Michael Pavone <pavone@retrodev.com> parents: 653 diff changeset	2283 check_code_prologue(code);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2284 bp_stub = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2285 call(&native, bp_stub);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2286
908 20e30ca7e8a2 Fix problem in 68K debugger caused by stack alignment change Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	2287 uint32_t tmp_stack_off = code->stack_off;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2288 //Calculate length of prologue
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2289 check_cycles_int(&opts->gen, address);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2290 int check_int_size = code->cur-bp_stub;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2291 code->cur = bp_stub;
908 20e30ca7e8a2 Fix problem in 68K debugger caused by stack alignment change Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	2292 code->stack_off = tmp_stack_off;
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2293
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2294 //Save context and call breakpoint handler
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2295 call(code, opts->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2296 push_r(code, opts->gen.scratch1);
657 92ce5ea5ffc9 Use call_args and call_args_abi in Z80 core Michael Pavone <pavone@retrodev.com> parents: 656 diff changeset	2297 call_args_abi(code, bp_handler, 2, opts->gen.context_reg, opts->gen.scratch1);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2298 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2299 //Restore context
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2300 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2301 pop_r(code, opts->gen.scratch1);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2302 //do prologue stuff
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2303 cmp_rr(code, opts->gen.cycles, opts->gen.limit, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2304 code_ptr jmp_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2305 jcc(code, CC_NC, code->cur + 7);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2306 call(code, opts->gen.handle_cycle_limit_int);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2307 *jmp_off = code->cur - (jmp_off+1);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2308 //jump back to body of translated instruction
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2309 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2310 add_ir(code, check_int_size - (native.cur-start_native), opts->gen.scratch1, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2311 jmp_r(code, opts->gen.scratch1);
908 20e30ca7e8a2 Fix problem in 68K debugger caused by stack alignment change Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	2312 code->stack_off = tmp_stack_off;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2313 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2314 call(&native, bp_stub);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2315 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2316 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2317
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	2318 void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2319 {
440 306986209cba Fix 68K test harness Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	2320 memset(opts, 0, sizeof(*opts));
653 a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 620 diff changeset	2321 opts->gen.memmap = memmap;
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores Michael Pavone <pavone@retrodev.com> parents: 620 diff changeset	2322 opts->gen.memmap_chunks = num_chunks;
589 2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2323 opts->gen.address_size = SZ_D;
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2324 opts->gen.address_mask = 0xFFFFFF;
596 9853bcce4729 Set the byte_swap flag in the M68K core so gen_mem_fun correctly inserts xor instructions for byte access functions Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	2325 opts->gen.byte_swap = 1;
589 2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2326 opts->gen.max_address = 0x1000000;
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2327 opts->gen.bus_cycles = BUS;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	2328 opts->gen.clock_divider = clock_divider;
589 2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2329 opts->gen.mem_ptr_off = offsetof(m68k_context, mem_pointers);
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2330 opts->gen.ram_flags_off = offsetof(m68k_context, ram_code_flags);
620 9d6fed6501ba Fix handling of code writes for Z80 core. This seems to get things close to being back to where they were before the big refactor that broke the Z80 core. Some problems remain. Notably the sound driver in Sonic 2 is still quite broken. Michael Pavone <pavone@retrodev.com> parents: 612 diff changeset	2331 opts->gen.ram_flags_shift = 11;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2332 for (int i = 0; i < 8; i++)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2333 {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2334 opts->dregs[i] = opts->aregs[i] = -1;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2335 }
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2336 #ifdef X86_64
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2337 opts->dregs[0] = R10;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2338 opts->dregs[1] = R11;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2339 opts->dregs[2] = R12;
423 8e136187c0e0 Use the registers that were freed up by the memory map function changes Mike Pavone <pavone@retrodev.com> parents: 352 diff changeset	2340 opts->dregs[3] = R8;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2341 opts->aregs[0] = R13;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2342 opts->aregs[1] = R14;
423 8e136187c0e0 Use the registers that were freed up by the memory map function changes Mike Pavone <pavone@retrodev.com> parents: 352 diff changeset	2343 opts->aregs[2] = R9;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2344 opts->aregs[7] = R15;
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2345
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2346 opts->flag_regs[0] = -1;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2347 opts->flag_regs[1] = RBX;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2348 opts->flag_regs[2] = RDX;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2349 opts->flag_regs[3] = BH;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2350 opts->flag_regs[4] = DH;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2351
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2352 opts->gen.scratch2 = RDI;
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2353 #else
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2354 opts->dregs[0] = RDX;
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2355 opts->aregs[7] = RDI;
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2356
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2357 for (int i = 0; i < 5; i++)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2358 {
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2359 opts->flag_regs[i] = -1;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2360 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2361 opts->gen.scratch2 = RBX;
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2362 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2363 opts->gen.context_reg = RSI;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2364 opts->gen.cycles = RAX;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2365 opts->gen.limit = RBP;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2366 opts->gen.scratch1 = RCX;
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2367 opts->gen.align_error_mask = 1;
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2368
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2369
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2370 opts->gen.native_code_map = malloc(sizeof(native_map_slot) * NATIVE_MAP_CHUNKS);
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2371 memset(opts->gen.native_code_map, 0, sizeof(native_map_slot) * NATIVE_MAP_CHUNKS);
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2372 opts->gen.deferred = NULL;
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 689 diff changeset	2373
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 689 diff changeset	2374 uint32_t inst_size_size = sizeof(uint8_t ) ram_size(&opts->gen) / 1024;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 689 diff changeset	2375 opts->gen.ram_inst_sizes = malloc(inst_size_size);
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 689 diff changeset	2376 memset(opts->gen.ram_inst_sizes, 0, inst_size_size);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2377
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2378 code_info *code = &opts->gen.code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2379 init_code_info(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2380
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2381 opts->gen.save_context = code->cur;
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2382 for (int i = 0; i < 5; i++)
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2383 if (opts->flag_regs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2384 mov_rrdisp(code, opts->flag_regs[i], opts->gen.context_reg, offsetof(m68k_context, flags) + i, SZ_B);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2385 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2386 for (int i = 0; i < 8; i++)
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2387 {
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2388 if (opts->dregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2389 mov_rrdisp(code, opts->dregs[i], opts->gen.context_reg, offsetof(m68k_context, dregs) + sizeof(uint32_t) * i, SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2390 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2391 if (opts->aregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2392 mov_rrdisp(code, opts->aregs[i], opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2393 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2394 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2395 mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(m68k_context, current_cycle), SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2396 retn(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2397
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2398 opts->gen.load_context = code->cur;
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2399 for (int i = 0; i < 5; i++)
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 689 diff changeset	2400 {
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2401 if (opts->flag_regs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2402 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + i, opts->flag_regs[i], SZ_B);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2403 }
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 689 diff changeset	2404 }
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2405 for (int i = 0; i < 8; i++)
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2406 {
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2407 if (opts->dregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2408 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, dregs) + sizeof(uint32_t) * i, opts->dregs[i], SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2409 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2410 if (opts->aregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2411 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, opts->aregs[i], SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2412 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2413 }
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2414 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, current_cycle), opts->gen.cycles, SZ_D);
24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2415 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, target_cycle), opts->gen.limit, SZ_D);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2416 retn(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2417
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2418 opts->start_context = (start_fun)code->cur;
665 d0943769353b Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64 Michael Pavone <pavone@retrodev.com> parents: 657 diff changeset	2419 save_callee_save_regs(code);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2420 #ifdef X86_64
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2421 if (opts->gen.scratch2 != RDI) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2422 mov_rr(code, RDI, opts->gen.scratch2, SZ_PTR);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2423 }
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2424 #else
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2425 mov_rdispr(code, RSP, 20, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2426 mov_rdispr(code, RSP, 24, opts->gen.context_reg, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2427 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2428 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2429 call_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2430 call(code, opts->gen.save_context);
665 d0943769353b Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64 Michael Pavone <pavone@retrodev.com> parents: 657 diff changeset	2431 restore_callee_save_regs(code);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2432 retn(code);
540 4ca826862174 Generate m68k_start_context at runtime so it can use the generated load_context and save_context Michael Pavone <pavone@retrodev.com> parents: 539 diff changeset	2433
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2434 opts->native_addr = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2435 call(code, opts->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2436 push_r(code, opts->gen.context_reg);
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2437 call_args(code, (code_ptr)get_native_address_trans, 2, opts->gen.context_reg, opts->gen.scratch1);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2438 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); //move result to scratch reg
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2439 pop_r(code, opts->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2440 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2441 retn(code);
544 8a26567852b7 Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 543 diff changeset	2442
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2443 opts->native_addr_and_sync = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2444 call(code, opts->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2445 push_r(code, opts->gen.scratch1);
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 665 diff changeset	2446
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2447 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_D);
24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2448 call_args_abi(code, (code_ptr)sync_components, 2, opts->gen.context_reg, opts->gen.scratch1);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2449 pop_r(code, RSI); //restore saved address from opts->gen.scratch1
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2450 push_r(code, RAX); //save context pointer for later
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2451 call_args(code, (code_ptr)get_native_address_trans, 2, RAX, RSI);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2452 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); //move result to scratch reg
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2453 pop_r(code, opts->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2454 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2455 retn(code);
544 8a26567852b7 Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 543 diff changeset	2456
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2457 opts->gen.handle_cycle_limit = code->cur;
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2458 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), opts->gen.cycles, SZ_D);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2459 code_ptr skip_sync = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2460 jcc(code, CC_C, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2461 opts->do_sync = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2462 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2463 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2464 call(code, opts->gen.save_context);
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2465 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_D);
24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2466 call_args_abi(code, (code_ptr)sync_components, 2, opts->gen.context_reg, opts->gen.scratch1);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2467 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2468 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2469 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2470 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2471 *skip_sync = code->cur - (skip_sync+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2472 retn(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2473
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2474 opts->gen.handle_code_write = (code_ptr)m68k_handle_code_write;
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2475
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2476 check_alloc_code(code, 256);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2477 opts->gen.handle_align_error_write = code->cur;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2478 code->cur += 256;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2479 check_alloc_code(code, 256);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2480 opts->gen.handle_align_error_read = code->cur;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2481 code->cur += 256;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2482
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2483 opts->read_16 = gen_mem_fun(&opts->gen, memmap, num_chunks, READ_16, NULL);
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2484 opts->read_8 = gen_mem_fun(&opts->gen, memmap, num_chunks, READ_8, NULL);
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2485 opts->write_16 = gen_mem_fun(&opts->gen, memmap, num_chunks, WRITE_16, NULL);
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2486 opts->write_8 = gen_mem_fun(&opts->gen, memmap, num_chunks, WRITE_8, NULL);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2487
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2488 opts->read_32 = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2489 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2490 call(code, opts->read_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2491 mov_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2492 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2493 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2494 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2495 call(code, opts->read_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2496 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2497 movzx_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_W, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2498 shl_ir(code, 16, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2499 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2500 retn(code);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2501
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2502 opts->write_32_lowfirst = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2503 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2504 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2505 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2506 call(code, opts->write_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2507 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2508 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2509 shr_ir(code, 16, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2510 jmp(code, opts->write_16);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2511
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2512 opts->write_32_highfirst = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2513 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2514 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2515 shr_ir(code, 16, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2516 call(code, opts->write_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2517 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2518 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2519 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2520 jmp(code, opts->write_16);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2521
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2522 opts->get_sr = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2523 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, status), opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2524 shl_ir(code, 8, opts->gen.scratch1, SZ_W);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2525 if (opts->flag_regs[FLAG_X] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2526 mov_rr(code, opts->flag_regs[FLAG_X], opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2527 } else {
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2528 int8_t offset = offsetof(m68k_context, flags);
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2529 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2530 mov_rdispr(code, opts->gen.context_reg, offset, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2531 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2532 mov_rindr(code, opts->gen.context_reg, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2533 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2534 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2535 for (int flag = FLAG_N; flag <= FLAG_C; flag++)
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2536 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2537 shl_ir(code, 1, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2538 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2539 or_rr(code, opts->flag_regs[flag], opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2540 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2541 or_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2542 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2543 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2544 retn(code);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2545
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2546 opts->set_sr = code->cur;
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2547 for (int flag = FLAG_C; flag >= FLAG_X; flag--)
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2548 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2549 rcr_ir(code, 1, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2550 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2551 setcc_r(code, CC_C, opts->flag_regs[flag]);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2552 } else {
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2553 int8_t offset = offsetof(m68k_context, flags) + flag;
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2554 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2555 setcc_rdisp(code, CC_C, opts->gen.context_reg, offset);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2556 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2557 setcc_rind(code, CC_C, opts->gen.context_reg);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2558 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2559 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2560 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2561 shr_ir(code, 8, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2562 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2563 //set int pending flag in case we trigger an interrupt as a result of the mask change
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2564 mov_irdisp(code, INT_PENDING_SR_CHANGE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2565 retn(code);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2566
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2567 opts->set_ccr = code->cur;
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2568 for (int flag = FLAG_C; flag >= FLAG_X; flag--)
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2569 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2570 rcr_ir(code, 1, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2571 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2572 setcc_r(code, CC_C, opts->flag_regs[flag]);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2573 } else {
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2574 int8_t offset = offsetof(m68k_context, flags) + flag;
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2575 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2576 setcc_rdisp(code, CC_C, opts->gen.context_reg, offset);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2577 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2578 setcc_rind(code, CC_C, opts->gen.context_reg);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2579 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2580 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2581 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2582 retn(code);
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2583
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2584 code_info tmp_code = *code;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2585 code->cur = opts->gen.handle_align_error_write;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2586 code->last = code->cur + 256;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2587 //unwind the stack one functinon call
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2588 add_ir(code, 16, RSP, SZ_PTR);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2589 //save address that triggered error so we can write it to the 68K stack at the appropriate place
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2590 push_r(code, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2591 //swap USP and SSP if not already in supervisor mode
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2592 check_user_mode_swap_ssp_usp(opts);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2593 //save PC
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2594 subi_areg(opts, 4, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2595 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2596 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, last_prefetch_address), opts->gen.scratch1, SZ_D);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2597 call(code, opts->write_32_lowfirst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2598 //save status register
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2599 subi_areg(opts, 2, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2600 call(code, opts->get_sr);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2601 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2602 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2603 //save instruction register
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2604 subi_areg(opts, 2, 7);
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2605 //calculate IR
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2606 push_r(code, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2607 call(code, opts->gen.save_context);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2608 call_args_abi(code, (code_ptr)m68k_get_ir, 1, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2609 mov_rr(code, RAX, opts->gen.scratch1, SZ_W);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2610 pop_r(code, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2611 pop_r(code, opts->gen.scratch2); //access address
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2612 push_r(code, RAX); //save it for use in the "info" word
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2613 push_r(code, opts->gen.scratch2); //access address
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2614 call(code, opts->gen.load_context);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2615 //write it to the stack
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2616 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2617 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2618 //save access address
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2619 subi_areg(opts, 4, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2620 pop_r(code, opts->gen.scratch1);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2621 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2622 call(code, opts->write_32_lowfirst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2623 //save FC, I/N and R/W word'
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2624 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_W);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2625 //FC3 is basically the same as the supervisor bit
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2626 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, status), opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2627 shr_ir(code, 3, opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2628 and_ir(code, 4, opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2629 //set FC0 to one to indicate data access
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2630 or_ir(code, 1, opts->gen.scratch1, SZ_B);
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2631 //set undefined bits to IR value
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2632 pop_r(code, opts->gen.scratch2);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2633 and_ir(code, 0xFFE0, opts->gen.scratch2, SZ_W);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2634 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W);
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2635 subi_areg(opts, 2, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2636 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2637 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2638 //set supervisor bit
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2639 or_irdisp(code, 0x20, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2640 //load vector address
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2641 mov_ir(code, 4 * VECTOR_ADDRESS_ERROR, opts->gen.scratch1, SZ_D);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2642 call(code, opts->read_32);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2643 call(code, opts->native_addr_and_sync);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2644 cycles(&opts->gen, 18);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2645 jmp_r(code, opts->gen.scratch1);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2646
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2647 code->cur = opts->gen.handle_align_error_read;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2648 code->last = code->cur + 256;
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2649 //unwind the stack one functinon call
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2650 add_ir(code, 16, RSP, SZ_PTR);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2651 //save address that triggered error so we can write it to the 68K stack at the appropriate place
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2652 push_r(code, opts->gen.scratch1);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2653 //swap USP and SSP if not already in supervisor mode
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2654 check_user_mode_swap_ssp_usp(opts);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2655 //save PC
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2656 subi_areg(opts, 4, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2657 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2658 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, last_prefetch_address), opts->gen.scratch1, SZ_D);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2659 call(code, opts->write_32_lowfirst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2660 //save status register
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2661 subi_areg(opts, 2, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2662 call(code, opts->get_sr);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2663 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2664 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2665 //save instruction register
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2666 subi_areg(opts, 2, 7);
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2667 //calculate IR
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2668 push_r(code, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2669 call(code, opts->gen.save_context);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2670 call_args_abi(code, (code_ptr)m68k_get_ir, 1, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2671 mov_rr(code, RAX, opts->gen.scratch1, SZ_W);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2672 pop_r(code, opts->gen.context_reg);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2673 pop_r(code, opts->gen.scratch2); //access address
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2674 push_r(code, RAX); //save it for use in the "info" word
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2675 push_r(code, opts->gen.scratch2); //access address
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2676 call(code, opts->gen.load_context);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2677 //write it to the stack
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2678 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2679 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2680 //save access address
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2681 subi_areg(opts, 4, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2682 pop_r(code, opts->gen.scratch1);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2683 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2684 call(code, opts->write_32_lowfirst);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2685 //save FC, I/N and R/W word'
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2686 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_W);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2687 //FC3 is basically the same as the supervisor bit
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2688 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, status), opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2689 shr_ir(code, 3, opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2690 and_ir(code, 4, opts->gen.scratch1, SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2691 //set FC0 to one to indicate data access, and R/W to indicate read
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2692 or_ir(code, 0x11, opts->gen.scratch1, SZ_B);
989 d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2693 //set undefined bits to IR value
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2694 pop_r(code, opts->gen.scratch2);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2695 and_ir(code, 0xFFE0, opts->gen.scratch2, SZ_W);
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames Michael Pavone <pavone@retrodev.com> parents: 987 diff changeset	2696 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W);
987 1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2697 subi_areg(opts, 2, 7);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2698 areg_to_native(opts, 7, opts->gen.scratch2);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2699 call(code, opts->write_16);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2700 //set supervisor bit
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2701 or_irdisp(code, 0x20, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2702 //load vector address
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2703 mov_ir(code, 4 * VECTOR_ADDRESS_ERROR, opts->gen.scratch1, SZ_D);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2704 call(code, opts->read_32);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2705 call(code, opts->native_addr_and_sync);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2706 cycles(&opts->gen, 18);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2707 jmp_r(code, opts->gen.scratch1);
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2708
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing. Michael Pavone <pavone@retrodev.com> parents: 986 diff changeset	2709 *code = tmp_code;
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2710
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2711 opts->gen.handle_cycle_limit_int = code->cur;
902 6011409ded0d Fix a few lingering stack alignment rework bugs Michael Pavone <pavone@retrodev.com> parents: 894 diff changeset	2712 //calculate stack adjust size
6011409ded0d Fix a few lingering stack alignment rework bugs Michael Pavone <pavone@retrodev.com> parents: 894 diff changeset	2713 add_ir(code, 16-sizeof(void*), RSP, SZ_PTR);
6011409ded0d Fix a few lingering stack alignment rework bugs Michael Pavone <pavone@retrodev.com> parents: 894 diff changeset	2714 uint32_t adjust_size = code->cur - opts->gen.handle_cycle_limit_int;
6011409ded0d Fix a few lingering stack alignment rework bugs Michael Pavone <pavone@retrodev.com> parents: 894 diff changeset	2715 code->cur = opts->gen.handle_cycle_limit_int;
908 20e30ca7e8a2 Fix problem in 68K debugger caused by stack alignment change Michael Pavone <pavone@retrodev.com> parents: 902 diff changeset	2716
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2717 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_cycle), opts->gen.cycles, SZ_D);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2718 code_ptr do_int = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2719 jcc(code, CC_NC, code->cur + 2);
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2720 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), opts->gen.cycles, SZ_D);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2721 skip_sync = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2722 jcc(code, CC_C, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2723 call(code, opts->gen.save_context);
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2724 call_args_abi(code, (code_ptr)sync_components, 2, opts->gen.context_reg, opts->gen.scratch1);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2725 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2726 jmp(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2727 *skip_sync = code->cur - (skip_sync+1);
872 7022ba865cfd Initial work for allowing loading a ROM from menu Michael Pavone <pavone@retrodev.com> parents: 847 diff changeset	2728 cmp_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, should_return), SZ_B);
7022ba865cfd Initial work for allowing loading a ROM from menu Michael Pavone <pavone@retrodev.com> parents: 847 diff changeset	2729 code_ptr do_ret = code->cur + 1;
7022ba865cfd Initial work for allowing loading a ROM from menu Michael Pavone <pavone@retrodev.com> parents: 847 diff changeset	2730 jcc(code, CC_NZ, do_ret);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2731 retn(code);
872 7022ba865cfd Initial work for allowing loading a ROM from menu Michael Pavone <pavone@retrodev.com> parents: 847 diff changeset	2732 *do_ret = code->cur - (do_ret+1);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2733 uint32_t tmp_stack_off = code->stack_off;
a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2734 //fetch return address and adjust RSP
872 7022ba865cfd Initial work for allowing loading a ROM from menu Michael Pavone <pavone@retrodev.com> parents: 847 diff changeset	2735 pop_r(code, opts->gen.scratch1);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2736 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR);
902 6011409ded0d Fix a few lingering stack alignment rework bugs Michael Pavone <pavone@retrodev.com> parents: 894 diff changeset	2737 add_ir(code, adjust_size, opts->gen.scratch1, SZ_PTR);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2738 //save return address for restoring later
883 9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game Michael Pavone <pavone@retrodev.com> parents: 872 diff changeset	2739 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, resume_pc), SZ_PTR);
872 7022ba865cfd Initial work for allowing loading a ROM from menu Michael Pavone <pavone@retrodev.com> parents: 847 diff changeset	2740 retn(code);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2741 code->stack_off = tmp_stack_off;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2742 *do_int = code->cur - (do_int+1);
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2743 //implement 1 instruction latency
98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2744 cmp_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2745 do_int = code->cur + 1;
98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2746 jcc(code, CC_NZ, do_int);
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2747 //store current interrupt number so it doesn't change before we start processing the vector
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2748 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B);
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2749 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
846 98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2750 retn(code);
98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM Michael Pavone <pavone@retrodev.com> parents: 839 diff changeset	2751 *do_int = code->cur - (do_int + 1);
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2752 //Check if int_pending has an actual interrupt priority in it
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2753 cmp_irdisp(code, INT_PENDING_SR_CHANGE, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2754 code_ptr already_int_num = code->cur + 1;
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2755 jcc(code, CC_NZ, already_int_num);
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2756
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2757 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch2, SZ_B);
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2758 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2759
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2760 *already_int_num = code->cur - (already_int_num + 1);
847 7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2761 //save PC as stored in scratch1 for later
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2762 push_r(code, opts->gen.scratch1);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2763 //set target cycle to sync cycle
656 24ccfd70133a Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand Michael Pavone <pavone@retrodev.com> parents: 654 diff changeset	2764 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), opts->gen.limit, SZ_D);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2765 //swap USP and SSP if not already in supervisor mode
687 a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	2766 check_user_mode_swap_ssp_usp(opts);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2767 //save status register
847 7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2768 subi_areg(opts, 6, 7);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2769 call(code, opts->get_sr);
847 7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2770 //6 cycles before SR gets saved
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2771 cycles(&opts->gen, 6);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2772 //save SR to stack
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2773 areg_to_native(opts, 7, opts->gen.scratch2);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2774 call(code, opts->write_16);
847 7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2775 //interrupt ack cycle
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2776 //the Genesis responds to these exclusively with !VPA which means its a slow
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2777 //6800 operation. documentation says these can take between 10 and 19 cycles.
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2778 //actual results measurements seem to suggest it's actually between 9 and 18
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2779 //WARNING: this code might break with register assignment changes
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2780 //save RDX
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2781 push_r(code, RDX);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2782 //save cycle count
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2783 mov_rr(code, RAX, opts->gen.scratch1, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2784 //clear top doubleword of dividend
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2785 xor_rr(code, RDX, RDX, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2786 //set divisor to clock divider
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2787 mov_ir(code, opts->gen.clock_divider, opts->gen.scratch2, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2788 div_r(code, opts->gen.scratch2, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2789 //discard remainder
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2790 xor_rr(code, RDX, RDX, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2791 //set divisor to 10, the period of E
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2792 mov_ir(code, 10, opts->gen.scratch2, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2793 div_r(code, opts->gen.scratch2, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2794 //delay will be (9 + 4 + the remainder) * clock_divider
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2795 //the extra 4 is to cover the idle bus period after the ack
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2796 add_ir(code, 9 + 4, RDX, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2797 mov_ir(code, opts->gen.clock_divider, RAX, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2798 mul_r(code, RDX, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2799 pop_r(code, RDX);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2800 //add saved cycle count to result
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2801 add_rr(code, opts->gen.scratch1, RAX, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2802
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2803 //update status register
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2804 and_irdisp(code, 0xF8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2805 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2806 or_ir(code, 0x20, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2807 or_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
847 7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2808
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2809 pop_r(code, opts->gen.scratch1);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2810
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2811 //save PC
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2812 areg_to_native(opts, 7, opts->gen.scratch2);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2813 add_ir(code, 2, opts->gen.scratch2, SZ_D);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2814 call(code, opts->write_32_lowfirst);
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2815
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2816 //grab saved interrupt number
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2817 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_D);
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2818 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_pending), opts->gen.scratch1, SZ_B);
887 fb4d09f874dd Prevent the current interrupt number from being changed while interrupt is being processed. This fixes a bug in Sonic 2 split screen that showed up when interrupt timing was adjusted Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	2819 //ack the interrupt (happens earlier on hardware, but shouldn't be an observable difference)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2820 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_ack), SZ_W);
887 fb4d09f874dd Prevent the current interrupt number from being changed while interrupt is being processed. This fixes a bug in Sonic 2 split screen that showed up when interrupt timing was adjusted Michael Pavone <pavone@retrodev.com> parents: 883 diff changeset	2821 //calculate the vector address
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2822 shl_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2823 add_ir(code, 0x60, opts->gen.scratch1, SZ_D);
996 784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2824 //clear out pending flag
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2825 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again. Michael Pavone <pavone@retrodev.com> parents: 990 diff changeset	2826 //read vector
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2827 call(code, opts->read_32);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2828 call(code, opts->native_addr_and_sync);
847 7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2829 //2 prefetch bus operations + 2 idle bus cycles
7decd421cdc8 Update timing and order of steps in interrupt processing to match latest measurements Michael Pavone <pavone@retrodev.com> parents: 846 diff changeset	2830 cycles(&opts->gen, 10);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2831 tmp_stack_off = code->stack_off;
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2832 //discard function return address
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2833 pop_r(code, opts->gen.scratch2);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2834 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2835 jmp_r(code, opts->gen.scratch1);
894 a7774fc2de4b Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted. Michael Pavone <pavone@retrodev.com> parents: 887 diff changeset	2836 code->stack_off = tmp_stack_off;
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2837
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2838 opts->trap = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2839 push_r(code, opts->gen.scratch2);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2840 //swap USP and SSP if not already in supervisor mode
687 a61d33ccea7d Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 686 diff changeset	2841 check_user_mode_swap_ssp_usp(opts);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2842 //save PC
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2843 subi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2844 areg_to_native(opts, 7, opts->gen.scratch2);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2845 call(code, opts->write_32_lowfirst);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2846 //save status register
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2847 subi_areg(opts, 2, 7);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2848 call(code, opts->get_sr);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2849 areg_to_native(opts, 7, opts->gen.scratch2);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2850 call(code, opts->write_16);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2851 //set supervisor bit
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2852 or_irdisp(code, 0x20, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2853 //calculate vector address
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2854 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2855 shl_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2856 call(code, opts->read_32);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2857 call(code, opts->native_addr_and_sync);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2858 cycles(&opts->gen, 18);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2859 jmp_r(code, opts->gen.scratch1);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2860 }

Mercurial > repos > blastem

annotate m68k_core_x86.c @ 1026:7267bc1ab547