repos/blastem: blastem.c annotate

annotate blastem.c @ 718:eaba6789f316

Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.

author	Michael Pavone <pavone@retrodev.com>
date	Wed, 20 May 2015 10:35:03 -0700
parents	22dbdf50d33c
children	019d27995e32

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	2 Copyright 2013 Michael Pavone
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	5 */
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "68kinst.h"
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	7 #include "m68k_core.h"
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	8 #include "z80_to_x86.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include "mem.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	10 #include "vdp.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	11 #include "render.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	12 #include "blastem.h"
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	13 #include "gdb_remote.h"
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	14 #include "gst.h"
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	15 #include "util.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	16 #include <stdio.h>
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 #include <stdlib.h>
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	18 #include <string.h>
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	19
531 46a60bb5f785 Update version number Mike Pavone <pavone@retrodev.com> parents: 529 diff changeset	20 #define BLASTEM_VERSION "0.2.0"
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	21
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	22 #define MCLKS_NTSC 53693175
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	23 #define MCLKS_PAL 53203395
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	24
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	25 #define MCLKS_PER_68K 7
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	26 #define MCLKS_PER_YM MCLKS_PER_68K
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	27 #define MCLKS_PER_Z80 15
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	28 #define MCLKS_PER_PSG (MCLKS_PER_Z80*16)
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	29
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	30 //TODO: Figure out the exact value for this
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	31 #define LINES_NTSC 262
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	32 #define LINES_PAL 312
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	33
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	34 #define MAX_SOUND_CYCLES 100000
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	35
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	36 uint16_t cart[CARTRIDGE_WORDS];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	37 uint16_t ram[RAM_WORDS];
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	38 uint8_t z80_ram[Z80_RAM_BYTES];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	39
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	40 int headless = 0;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	41 int exit_after = 0;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	42 int z80_enabled = 1;
356 79e4b466e7d0 Get rid of debug puts and limit based on audio rather than frame rate by default. Mike Pavone <pavone@retrodev.com> parents: 354 diff changeset	43 int frame_limit = 0;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	44
430 7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	45 tern_node * config;
7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	46
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	47 #ifndef MIN
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	48 #define MIN(a,b) ((a) < (b) ? (a) : (b))
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	49 #endif
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	50
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	51 #define SMD_HEADER_SIZE 512
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	52 #define SMD_MAGIC1 0x03
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	53 #define SMD_MAGIC2 0xAA
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	54 #define SMD_MAGIC3 0xBB
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	55 #define SMD_BLOCK_SIZE 0x4000
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	56
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	57 int load_smd_rom(long filesize, FILE * f)
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	58 {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	59 uint8_t block[SMD_BLOCK_SIZE];
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	60 filesize -= SMD_HEADER_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	61 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	62
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	63 uint16_t * dst = cart;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	64 while (filesize > 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	65 fread(block, 1, SMD_BLOCK_SIZE, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	66 for (uint8_t low = block, high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	67 (dst++) = high << 8 \| *low;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	68 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	69 filesize -= SMD_BLOCK_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	70 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	71 return 1;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	72 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	73
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	74 int load_rom(char * filename)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	75 {
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	76 uint8_t header[10];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	77 FILE * f = fopen(filename, "rb");
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	78 if (!f) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	79 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	80 }
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	81 fread(header, 1, sizeof(header), f);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	82 fseek(f, 0, SEEK_END);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	83 long filesize = ftell(f);
158 a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	84 if (filesize/2 > CARTRIDGE_WORDS) {
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	85 //carts bigger than 4MB not currently supported
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	86 filesize = CARTRIDGE_WORDS*2;
a2ab895d9708 Fix predec address mode when used as source Mike Pavone <pavone@retrodev.com> parents: 153 diff changeset	87 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	88 fseek(f, 0, SEEK_SET);
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	89 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	90 int i;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	91 for (i = 3; i < 8; i++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	92 if (header[i] != 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	93 break;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	94 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	95 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	96 if (i == 8) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	97 if (header[2]) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	98 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	99 exit(1);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	100 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	101 return load_smd_rom(filesize, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	102 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	103 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	104 fread(cart, 2, filesize/2, f);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	105 fclose(f);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	106 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	107 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	108 cur = (cur >> 8) \| (*cur << 8);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	109 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	110 //TODO: Mirror ROM
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	111 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	112 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	113
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	114 uint16_t read_dma_value(uint32_t address)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	115 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	116 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	117 if (address < 0x200000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	118 return cart[address];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	119 } else if(address >= 0x700000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	120 return ram[address & 0x7FFF];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	121 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	122 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	123 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	124 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	125
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	126 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	127 {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	128 //static int old_int_cycle = CYCLE_NEVER;
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	129 genesis_context *gen = context->system;
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	130 if (context->sync_cycle - context->current_cycle > gen->max_cycles) {
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	131 context->sync_cycle = context->current_cycle + gen->max_cycles;
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	132 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	133 context->int_cycle = CYCLE_NEVER;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	134 if ((context->status & 0x7) < 6) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	135 uint32_t next_vint = vdp_next_vint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	136 if (next_vint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	137 context->int_cycle = next_vint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	138 context->int_num = 6;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	139 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	140 if ((context->status & 0x7) < 4) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	141 uint32_t next_hint = vdp_next_hint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	142 if (next_hint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	143 if (next_hint < context->int_cycle) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	144 context->int_cycle = next_hint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	145 context->int_num = 4;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	146
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	147 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	148 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	149 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	150 }
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	151 /*if (context->int_cycle != old_int_cycle) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	152 printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->current_cycle, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter);
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	153 old_int_cycle = context->int_cycle;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	154 }*/
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	155
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	156 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	157 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n",
32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	158 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7),
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	159 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	160 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	161
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	162 int break_on_sync = 0;
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	163 int save_state = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	164
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	165 //#define DO_DEBUG_PRINT
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	166 #ifdef DO_DEBUG_PRINT
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	167 #define dprintf printf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	168 #define dputs puts
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	169 #else
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	170 #define dprintf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	171 #define dputs
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	172 #endif
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	173
402 de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	174 #define Z80_VINT_DURATION 128
de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	175
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	176 void z80_next_int_pulse(z80_context * z_context)
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	177 {
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 680 559 diff changeset	178 genesis_context * gen = z_context->system;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	179 z_context->int_pulse_start = vdp_next_vint_z80(gen->vdp);
670 f4f3e74b0ce6 Restore Z80 interrupt pulse duration and make a small improvement to debug print output Michael Pavone <pavone@retrodev.com> parents: 669 diff changeset	180 z_context->int_pulse_end = z_context->int_pulse_start + Z80_VINT_DURATION * MCLKS_PER_Z80;
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 680 559 diff changeset	181 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	182
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	183 void sync_z80(z80_context * z_context, uint32_t mclks)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	184 {
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	185 #ifndef NO_Z80
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	186 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	187 z80_run(z_context, mclks);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	188 } else
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	189 #endif
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	190 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	191 z_context->current_cycle = mclks;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	192 }
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	193 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	194
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	195 void sync_sound(genesis_context * gen, uint32_t target)
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	196 {
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	197 //printf("YM \| Cycle: %d, bpos: %d, PSG \| Cycle: %d, bpos: %d\n", gen->ym->current_cycle, gen->ym->buffer_pos, gen->psg->cycles, gen->psg->buffer_pos * 2);
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	198 while (target > gen->psg->cycles && target - gen->psg->cycles > MAX_SOUND_CYCLES) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	199 uint32_t cur_target = gen->psg->cycles + MAX_SOUND_CYCLES;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	200 //printf("Running PSG to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	201 psg_run(gen->psg, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	202 //printf("Running YM-2612 to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	203 ym_run(gen->ym, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	204 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	205 psg_run(gen->psg, target);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	206 ym_run(gen->ym, target);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	207
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	208 //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	209 }
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	210
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	211 uint32_t last_frame_num;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	212 m68k_context * sync_components(m68k_context * context, uint32_t address)
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	213 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	214 genesis_context * gen = context->system;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	215 vdp_context * v_context = gen->vdp;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	216 z80_context * z_context = gen->z80;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	217 uint32_t mclks = context->current_cycle;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	218 sync_z80(z_context, mclks);
695 e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	219 sync_sound(gen, mclks);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	220 vdp_run_context(v_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	221 if (v_context->frame != last_frame_num) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	222 //printf("reached frame end %d \| MCLK Cycles: %d, Target: %d, VDP cycles: %d, vcounter: %d, hslot: %d\n", last_frame_num, mclks, gen->frame_end, v_context->cycles, v_context->vcounter, v_context->hslot);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	223 last_frame_num = v_context->frame;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	224
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	225 if (!headless) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	226 break_on_sync \|= wait_render_frame(v_context, frame_limit);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	227 } else if(exit_after){
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	228 --exit_after;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	229 if (!exit_after) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	230 exit(0);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	231 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	232 }
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	233
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	234 vdp_adjust_cycles(v_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	235 io_adjust_cycles(gen->ports, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	236 io_adjust_cycles(gen->ports+1, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	237 io_adjust_cycles(gen->ports+2, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	238 context->current_cycle -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	239 z80_adjust_cycles(z_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	240 gen->ym->current_cycle -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	241 gen->psg->cycles -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	242 if (gen->ym->write_cycle != CYCLE_NEVER) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	243 gen->ym->write_cycle = gen->ym->write_cycle >= mclks ? gen->ym->write_cycle - mclks : 0;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	244 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	245 }
700 72ab94527a8a Tiny cleanup Michael Pavone <pavone@retrodev.com> parents: 697 diff changeset	246 gen->frame_end = vdp_cycles_to_frame_end(v_context);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	247 context->sync_cycle = gen->frame_end;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	248 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	249 if (context->int_ack) {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	250 //printf("acknowledging %d @ %d:%d, vcounter: %d, hslot: %d\n", context->int_ack, context->current_cycle, v_context->cycles, v_context->vcounter, v_context->hslot);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	251 vdp_int_ack(v_context, context->int_ack);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	252 context->int_ack = 0;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	253 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	254 adjust_int_cycle(context, v_context);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	255 if (address) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	256 if (break_on_sync) {
695 e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	257 break_on_sync = 0;
e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	258 debugger(context, address);
e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	259 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	260 if (save_state) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	261 save_state = 0;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	262 //advance Z80 core to the start of an instruction
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	263 while (!z_context->pc)
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	264 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	265 sync_z80(z_context, z_context->current_cycle + MCLKS_PER_Z80);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	266 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	267 save_gst(gen, "savestate.gst", address);
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	268 }
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	269 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	270 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	271 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	272
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	273 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	274 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	275 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	276 printf("machine freeze due to write to address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	277 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	278 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	279 vdp_port &= 0x1F;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	280 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	281 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	282 vdp_context * v_context = context->video_context;
508 b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	283 genesis_context * gen = context->system;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	284 if (vdp_port < 0x10) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	285 int blocked;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	286 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	287 if (vdp_port < 4) {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	288
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	289 while (vdp_data_port_write(v_context, value) < 0) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	290 while(v_context->flags & FLAG_DMA_RUN) {
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	291 vdp_run_dma_done(v_context, gen->frame_end);
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	292 if (v_context->cycles >= gen->frame_end) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	293 context->current_cycle = v_context->cycles;
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	294 gen->bus_busy = 1;
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	295 sync_components(context, 0);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	296 gen->bus_busy = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	297 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	298 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	299 //context->current_cycle = v_context->cycles;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	300 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	301 } else if(vdp_port < 8) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	302 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	303 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	304 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	305 while(v_context->flags & FLAG_DMA_RUN) {
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	306 vdp_run_dma_done(v_context, gen->frame_end);
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	307 if (v_context->cycles >= gen->frame_end) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	308 context->current_cycle = v_context->cycles;
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	309 gen->bus_busy = 1;
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	310 sync_components(context, 0);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	311 gen->bus_busy = 0;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	312 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	313 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	314 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	315 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	316 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	317 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	318 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	319 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	320 } else {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	321 context->sync_cycle = gen->frame_end = vdp_cycles_to_frame_end(v_context);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	322 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	323 adjust_int_cycle(context, v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	324 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	325 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	326 printf("Illegal write to HV Counter port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	327 exit(1);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	328 }
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	329 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	330 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	331 context->current_cycle = v_context->cycles;
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	332 //Lock the Z80 out of the bus until the VDP access is complete
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	333 gen->bus_busy = 1;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	334 sync_z80(gen->z80, v_context->cycles);
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	335 gen->bus_busy = 0;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	336 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	337 } else if (vdp_port < 0x18) {
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	338 psg_write(gen->psg, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	339 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	340 //TODO: Implement undocumented test register(s)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	341 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	342 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	343 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	344
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	345 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	346 {
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	347 return vdp_port_write(vdp_port, context, vdp_port < 0x10 ? value \| value << 8 : ((vdp_port & 1) ? value : 0));
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	348 }
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	349
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	350 void * z80_vdp_port_write(uint32_t vdp_port, void * vcontext, uint8_t value)
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	351 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	352 z80_context * context = vcontext;
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	353 genesis_context * gen = context->system;
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	354 vdp_port &= 0xFF;
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	355 if (vdp_port & 0xE0) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	356 printf("machine freeze due to write to Z80 address %X\n", 0x7F00 \| vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	357 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	358 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	359 if (vdp_port < 0x10) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	360 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	361 vdp_run_context(gen->vdp, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	362 if (vdp_port < 4) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	363 vdp_data_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	364 } else if (vdp_port < 8) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	365 vdp_control_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	366 } else {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	367 printf("Illegal write to HV Counter port %X\n", vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	368 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	369 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	370 } else if (vdp_port < 0x18) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	371 sync_sound(gen, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	372 psg_write(gen->psg, value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	373 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	374 vdp_test_port_write(gen->vdp, value);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	375 }
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	376 return context;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	377 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	378
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	379 uint16_t vdp_port_read(uint32_t vdp_port, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	380 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	381 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	382 printf("machine freeze due to read from address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	383 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	384 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	385 vdp_port &= 0x1F;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	386 uint16_t value;
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	387 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	388 vdp_context * v_context = context->video_context;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	389 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	390 if (vdp_port < 0x10) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	391 if (vdp_port < 4) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	392 value = vdp_data_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	393 } else if(vdp_port < 8) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	394 value = vdp_control_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	395 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	396 value = vdp_hv_counter_read(v_context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	397 //printf("HV Counter: %X at cycle %d\n", value, v_context->cycles);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	398 }
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	399 } else if (vdp_port < 0x18){
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	400 printf("Illegal read from PSG port %X\n", vdp_port);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	401 exit(1);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	402 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	403 value = vdp_test_port_read(v_context);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	404 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	405 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	406 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	407 context->current_cycle = v_context->cycles;
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	408 //Lock the Z80 out of the bus until the VDP access is complete
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	409 genesis_context *gen = context->system;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	410 gen->bus_busy = 1;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	411 sync_z80(gen->z80, v_context->cycles);
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	412 gen->bus_busy = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	413 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	414 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	415 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	416
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	417 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	418 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	419 uint16_t value = vdp_port_read(vdp_port, context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	420 if (vdp_port & 1) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	421 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	422 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	423 return value >> 8;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	424 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	425 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	426
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	427 uint8_t z80_vdp_port_read(uint32_t vdp_port, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	428 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	429 z80_context * context = vcontext;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	430 if (vdp_port & 0xE0) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	431 printf("machine freeze due to read from Z80 address %X\n", 0x7F00 \| vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	432 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	433 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	434 genesis_context * gen = context->system;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	435 vdp_port &= 0x1F;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	436 uint16_t ret;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	437 if (vdp_port < 0x10) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	438 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	439 vdp_run_context(gen->vdp, context->current_cycle);
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	440 if (vdp_port < 4) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	441 ret = vdp_data_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	442 } else if (vdp_port < 8) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	443 ret = vdp_control_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	444 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	445 printf("Illegal write to HV Counter port %X\n", vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	446 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	447 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	448 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	449 //TODO: Figure out the correct value today
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	450 ret = 0xFFFF;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	451 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	452 return vdp_port & 1 ? ret : ret >> 8;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	453 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	454
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	455 uint32_t zram_counter = 0;
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	456
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	457 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	458 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	459 genesis_context * gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	460 if (location < 0x10000) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	461 if (!z80_enabled \|\| z80_get_busack(gen->z80, context->current_cycle)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	462 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	463 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	464 z80_ram[location & 0x1FFF] = value;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	465 #ifndef NO_Z80
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	466 z80_handle_code_write(location & 0x1FFF, gen->z80);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	467 #endif
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	468 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	469 sync_sound(gen, context->current_cycle);
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	470 if (location & 1) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	471 ym_data_write(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	472 } else if(location & 2) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	473 ym_address_write_part2(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	474 } else {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	475 ym_address_write_part1(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	476 }
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	477 } else if (location == 0x6000) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	478 gen->z80->bank_reg = (gen->z80->bank_reg >> 1 \| value << 8) & 0x1FF;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	479 if (gen->z80->bank_reg < 0x80) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	480 gen->z80->mem_pointers[1] = (gen->z80->bank_reg << 15) + ((char *)gen->z80->mem_pointers[2]);
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	481 } else {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	482 gen->z80->mem_pointers[1] = NULL;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	483 }
395 0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	484 } else {
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	485 printf("68K write to unhandled Z80 address %X\n", location);
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	486 exit(1);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	487 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	488 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	489 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	490 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	491 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	492 switch(location/2)
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	493 {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	494 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	495 io_data_write(gen->ports, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	496 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	497 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	498 io_data_write(gen->ports+1, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	499 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	500 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	501 io_data_write(gen->ports+2, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	502 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	503 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	504 gen->ports[0].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	505 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	506 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	507 gen->ports[1].control = value;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	508 break;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	509 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	510 gen->ports[2].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	511 break;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	512 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	513 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	514 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	515 if (value & 1) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	516 dputs("bus requesting Z80");
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	517 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	518 z80_assert_busreq(gen->z80, context->current_cycle);
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	519 } else {
687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	520 gen->z80->busack = 1;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	521 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	522 } else {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	523 if (gen->z80->busreq) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	524 dputs("releasing z80 bus");
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	525 #ifdef DO_DEBUG_PRINT
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	526 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	527 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	528 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	529 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	530 fclose(f);
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	531 #endif
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	532 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	533 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	534 z80_clear_busreq(gen->z80, context->current_cycle);
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	535 } else {
687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	536 gen->z80->busack = 0;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	537 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	538 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	539 } else if (location == 0x1200) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	540 sync_z80(gen->z80, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	541 if (value & 1) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	542 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	543 z80_clear_reset(gen->z80, context->current_cycle);
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	544 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	545 gen->z80->reset = 0;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	546 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	547 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	548 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	549 z80_assert_reset(gen->z80, context->current_cycle);
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	550 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	551 gen->z80->reset = 1;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	552 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	553 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	554 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	555 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	556 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	557 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	558 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	559
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	560 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	561 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	562 if (location < 0x10000 \|\| (location & 0x1FFF) >= 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	563 return io_write(location, context, value >> 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	564 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	565 return io_write(location, context, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	566 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	567 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	568
130 0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	569 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	570 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	571 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	572 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	573 uint8_t version_reg = NO_DISK \| USA;
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	574
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	575 uint8_t io_read(uint32_t location, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	576 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	577 uint8_t value;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	578 genesis_context *gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	579 if (location < 0x10000) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	580 if (!z80_enabled \|\| z80_get_busack(gen->z80, context->current_cycle)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	581 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	582 if (location < 0x4000) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	583 value = z80_ram[location & 0x1FFF];
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	584 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	585 sync_sound(gen, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	586 value = ym_read_status(gen->ym);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	587 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	588 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	589 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	590 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	591 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	592 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	593 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	594 location &= 0x1FFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	595 if (location < 0x100) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	596 switch(location/2)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	597 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	598 case 0x0:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	599 //version bits should be 0 for now since we're not emulating TMSS
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	600 value = version_reg;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	601 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	602 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	603 value = io_data_read(gen->ports, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	604 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	605 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	606 value = io_data_read(gen->ports+1, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	607 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	608 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	609 value = io_data_read(gen->ports+2, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	610 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	611 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	612 value = gen->ports[0].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	613 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	614 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	615 value = gen->ports[1].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	616 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	617 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	618 value = gen->ports[2].control;
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	619 break;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	620 default:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	621 value = 0xFF;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	622 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	623 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	624 if (location == 0x1100) {
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	625 value = z80_enabled ? !z80_get_busack(gen->z80, context->current_cycle) : !gen->z80->busack;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	626 dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d)\n", value, context->current_cycle, gen->z80->reset);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	627 } else if (location == 0x1200) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	628 value = !gen->z80->reset;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	629 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	630 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	631 printf("Byte read of unknown IO location: %X\n", location);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	632 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	633 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	634 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	635 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	636 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	637
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	638 uint16_t io_read_w(uint32_t location, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	639 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	640 uint16_t value = io_read(location, context);
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	641 if (location < 0x10000 \|\| (location & 0x1FFF) < 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	642 value = value \| (value << 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	643 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	644 value <<= 8;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	645 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	646 return value;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	647 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	648
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	649 void * z80_write_ym(uint32_t location, void * vcontext, uint8_t value)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	650 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	651 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	652 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	653 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	654 if (location & 1) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	655 ym_data_write(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	656 } else if (location & 2) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	657 ym_address_write_part2(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	658 } else {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	659 ym_address_write_part1(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	660 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	661 return context;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	662 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	663
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	664 uint8_t z80_read_ym(uint32_t location, void * vcontext)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	665 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	666 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	667 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	668 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	669 return ym_read_status(gen->ym);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	670 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	671
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	672 uint8_t z80_read_bank(uint32_t location, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	673 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	674 z80_context * context = vcontext;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	675 genesis_context *gen = context->system;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	676 if (gen->bus_busy) {
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	677 context->current_cycle = context->sync_cycle;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	678 }
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	679 //typical delay from bus arbitration
671 8ad39a2b0bce Fix bank area access delay for master clock change Michael Pavone <pavone@retrodev.com> parents: 670 diff changeset	680 context->current_cycle += 3 * MCLKS_PER_Z80;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	681 //TODO: add cycle for an access right after a previous one
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	682
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	683 location &= 0x7FFF;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	684 if (context->mem_pointers[1]) {
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	685 return context->mem_pointers[1][location ^ 1];
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	686 }
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	687 uint32_t address = context->bank_reg << 15 \| location;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	688 if (address >= 0xC00000 && address < 0xE00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	689 return z80_vdp_port_read(location & 0xFF, context);
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	690 } else {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	691 fprintf(stderr, "Unhandled read by Z80 from address %X through banked memory area (%X)\n", address, context->bank_reg << 15);
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	692 }
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	693 return 0;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	694 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	695
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	696 void z80_write_bank(uint32_t location, void vcontext, uint8_t value)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	697 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	698 z80_context * context = vcontext;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	699 genesis_context *gen = context->system;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	700 if (gen->bus_busy) {
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	701 context->current_cycle = context->sync_cycle;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	702 }
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	703 //typical delay from bus arbitration
671 8ad39a2b0bce Fix bank area access delay for master clock change Michael Pavone <pavone@retrodev.com> parents: 670 diff changeset	704 context->current_cycle += 3 * MCLKS_PER_Z80;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	705 //TODO: add cycle for an access right after a previous one
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	706
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	707 location &= 0x7FFF;
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	708 uint32_t address = context->bank_reg << 15 \| location;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	709 if (address >= 0xE00000) {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	710 address &= 0xFFFF;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	711 ((uint8_t *)ram)[address ^ 1] = value;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	712 } else if (address >= 0xC00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	713 z80_vdp_port_write(location & 0xFF, context, value);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	714 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	715 fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address);
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	716 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	717 return context;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	718 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	719
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	720 void z80_write_bank_reg(uint32_t location, void vcontext, uint8_t value)
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	721 {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	722 z80_context * context = vcontext;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	723
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	724 context->bank_reg = (context->bank_reg >> 1 \| value << 8) & 0x1FF;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	725 if (context->bank_reg < 0x80) {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	726 genesis_context *gen = context->system;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	727 context->mem_pointers[1] = get_native_pointer(context->bank_reg << 15, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	728 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	729 context->mem_pointers[1] = NULL;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	730 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	731
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	732 return context;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	733 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	734
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	735 uint16_t read_sram_w(uint32_t address, m68k_context * context)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	736 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	737 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	738 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	739 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	740 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	741 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	742 return gen->save_ram[address] << 8 \| gen->save_ram[address+1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	743 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	744 return gen->save_ram[address >> 1] << 8 \| 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	745 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	746 return gen->save_ram[address >> 1] \| 0xFF00;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	747 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	748 return 0xFFFF;//We should never get here
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	749 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	750
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	751 uint8_t read_sram_b(uint32_t address, m68k_context * context)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	752 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	753 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	754 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	755 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	756 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	757 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	758 return gen->save_ram[address];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	759 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	760 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	761 return 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	762 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	763 return gen->save_ram[address >> 1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	764 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	765 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	766 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	767 return gen->save_ram[address >> 1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	768 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	769 return 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	770 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	771 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	772 return 0xFF;//We should never get here
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	773 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	774
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	775 m68k_context * write_sram_area_w(uint32_t address, m68k_context * context, uint16_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	776 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	777 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	778 if ((gen->bank_regs[0] & 0x3) == 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	779 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	780 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	781 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	782 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	783 gen->save_ram[address] = value >> 8;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	784 gen->save_ram[address+1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	785 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	786 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	787 gen->save_ram[address >> 1] = value >> 8;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	788 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	789 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	790 gen->save_ram[address >> 1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	791 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	792 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	793 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	794 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	795 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	796
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	797 m68k_context * write_sram_area_b(uint32_t address, m68k_context * context, uint8_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	798 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	799 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	800 if ((gen->bank_regs[0] & 0x3) == 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	801 address &= gen->save_ram_mask;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	802 switch(gen->save_flags)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	803 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	804 case RAM_FLAG_BOTH:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	805 gen->save_ram[address] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	806 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	807 case RAM_FLAG_EVEN:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	808 if (!(address & 1)) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	809 gen->save_ram[address >> 1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	810 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	811 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	812 case RAM_FLAG_ODD:
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	813 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	814 gen->save_ram[address >> 1] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	815 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	816 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	817 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	818 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	819 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	820 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	821
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	822 m68k_context * write_bank_reg_w(uint32_t address, m68k_context * context, uint16_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	823 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	824 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	825 address &= 0xE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	826 address >>= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	827 gen->bank_regs[address] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	828 if (!address) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	829 if (value & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	830 context->mem_pointers[2] = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	831 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	832 context->mem_pointers[2] = cart + 0x200000/2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	833 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	834 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	835 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	836 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	837
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	838 m68k_context * write_bank_reg_b(uint32_t address, m68k_context * context, uint8_t value)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	839 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	840 if (address & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	841 genesis_context * gen = context->system;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	842 address &= 0xE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	843 address >>= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	844 gen->bank_regs[address] = value;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	845 if (!address) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	846 if (value & 1) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	847 context->mem_pointers[2] = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	848 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	849 context->mem_pointers[2] = cart + 0x200000/2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	850 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	851 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	852 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	853 return context;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	854 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	855
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	856 void set_speed_percent(genesis_context * context, uint32_t percent)
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	857 {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	858 uint32_t old_clock = context->master_clock;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	859 context->master_clock = ((uint64_t)context->normal_clock * (uint64_t)percent) / 100;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	860 while (context->ym->current_cycle != context->psg->cycles) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	861 sync_sound(context, context->psg->cycles + MCLKS_PER_PSG);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	862 }
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	863 ym_adjust_master_clock(context->ym, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	864 psg_adjust_master_clock(context->psg, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	865 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	866
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	867 #define ROM_END 0x1A4
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	868 #define RAM_ID 0x1B0
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	869 #define RAM_FLAGS 0x1B2
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	870 #define RAM_START 0x1B4
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	871 #define RAM_END 0x1B8
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	872 #define MAX_MAP_CHUNKS (4+7+1)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	873 #define RAM_FLAG_MASK 0x1800
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	874
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	875 const memmap_chunk static_map[] = {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	876 {0, 0x400000, 0xFFFFFF, 0, MMAP_READ, cart,
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	877 NULL, NULL, NULL, NULL},
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	878 {0xE00000, 0x1000000, 0xFFFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, ram,
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	879 NULL, NULL, NULL, NULL},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	880 {0xC00000, 0xE00000, 0x1FFFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	881 (read_16_fun)vdp_port_read, (write_16_fun)vdp_port_write,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	882 (read_8_fun)vdp_port_read_b, (write_8_fun)vdp_port_write_b},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	883 {0xA00000, 0xA12000, 0x1FFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	884 (read_16_fun)io_read_w, (write_16_fun)io_write_w,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	885 (read_8_fun)io_read, (write_8_fun)io_write}
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	886 };
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	887
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	888 char * sram_filename;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	889 genesis_context * genesis;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	890 void save_sram()
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	891 {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	892 FILE * f = fopen(sram_filename, "wb");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	893 if (!f) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	894 fprintf(stderr, "Failed to open SRAM file %s for writing\n", sram_filename);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	895 return;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	896 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	897 uint32_t size = genesis->save_ram_mask+1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	898 if (genesis->save_flags != RAM_FLAG_BOTH) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	899 size/= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	900 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	901 fwrite(genesis->save_ram, 1, size, f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	902 fclose(f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	903 printf("Saved SRAM to %s\n", sram_filename);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	904 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	905
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	906 void init_run_cpu(genesis_context * gen, FILE * address_log, char * statefile, uint8_t * debugger)
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	907 {
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	908 m68k_options opts;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	909 memmap_chunk memmap[MAX_MAP_CHUNKS];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	910 uint32_t num_chunks;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	911 void * initial_mapped = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	912 gen->save_ram = NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	913 //TODO: Handle carts larger than 4MB
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	914 //TODO: Handle non-standard mappers
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	915 uint32_t size;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	916 if ((cart[RAM_ID/2] & 0xFF) == 'A' && (cart[RAM_ID/2] >> 8) == 'R') {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	917 //Cart has save RAM
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	918 uint32_t rom_end = ((cart[ROM_END/2] << 16) \| cart[ROM_END/2+1]) + 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	919 uint32_t ram_start = (cart[RAM_START/2] << 16) \| cart[RAM_START/2+1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	920 uint32_t ram_end = (cart[RAM_END/2] << 16) \| cart[RAM_END/2+1];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	921 uint16_t ram_flags = cart[RAM_FLAGS/2];
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	922 gen->save_flags = ram_flags & RAM_FLAG_MASK;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	923 memset(memmap, 0, sizeof(memmap_chunk)*2);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	924 if (ram_start >= rom_end) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	925 memmap[0].end = rom_end;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	926 memmap[0].mask = 0xFFFFFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	927 memmap[0].flags = MMAP_READ;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	928 memmap[0].buffer = cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	929
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	930 ram_start &= 0xFFFFFE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	931 ram_end \|= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	932 memmap[1].start = ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	933 gen->save_ram_mask = memmap[1].mask = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	934 ram_end += 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	935 memmap[1].end = ram_end;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	936 memmap[1].flags = MMAP_READ \| MMAP_WRITE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	937 size = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	938 if ((ram_flags & RAM_FLAG_MASK) == RAM_FLAG_ODD) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	939 memmap[1].flags \|= MMAP_ONLY_ODD;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	940 size /= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	941 } else if((ram_flags & RAM_FLAG_MASK) == RAM_FLAG_EVEN) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	942 memmap[1].flags \|= MMAP_ONLY_EVEN;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	943 size /= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	944 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	945 memmap[1].buffer = gen->save_ram = malloc(size);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	946
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	947 memcpy(memmap+2, static_map+1, sizeof(static_map)-sizeof(static_map[0]));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	948 num_chunks = sizeof(static_map)/sizeof(memmap_chunk)+1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	949 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	950 //Assume the standard Sega mapper for now
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	951 memmap[0].end = 0x200000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	952 memmap[0].mask = 0xFFFFFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	953 memmap[0].flags = MMAP_READ;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	954 memmap[0].buffer = cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	955
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	956 memmap[1].start = 0x200000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	957 memmap[1].end = 0x400000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	958 memmap[1].mask = 0x1FFFFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	959 ram_start &= 0xFFFFFE;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	960 ram_end \|= 1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	961 gen->save_ram_mask = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	962 memmap[1].flags = MMAP_READ \| MMAP_PTR_IDX \| MMAP_FUNC_NULL;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	963 memmap[1].ptr_index = 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	964 memmap[1].read_16 = (read_16_fun)read_sram_w;//these will only be called when mem_pointers[2] == NULL
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	965 memmap[1].read_8 = (read_8_fun)read_sram_b;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	966 memmap[1].write_16 = (write_16_fun)write_sram_area_w;//these will be called all writes to the area
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	967 memmap[1].write_8 = (write_8_fun)write_sram_area_b;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	968 memcpy(memmap+2, static_map+1, sizeof(static_map)-sizeof(static_map[0]));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	969 num_chunks = sizeof(static_map)/sizeof(memmap_chunk)+1;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	970 memset(memmap+num_chunks, 0, sizeof(memmap[num_chunks]));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	971 memmap[num_chunks].start = 0xA13000;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	972 memmap[num_chunks].end = 0xA13100;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	973 memmap[num_chunks].mask = 0xFF;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	974 memmap[num_chunks].write_16 = (write_16_fun)write_bank_reg_w;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	975 memmap[num_chunks].write_8 = (write_8_fun)write_bank_reg_b;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	976 num_chunks++;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	977 ram_end++;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	978 size = ram_end-ram_start;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	979 if ((ram_flags & RAM_FLAG_MASK) != RAM_FLAG_BOTH) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	980 size /= 2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	981 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	982 gen->save_ram = malloc(size);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	983 memmap[1].buffer = initial_mapped = cart + 0x200000/2;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	984 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	985 } else {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	986 memcpy(memmap, static_map, sizeof(static_map));
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	987 num_chunks = sizeof(static_map)/sizeof(memmap_chunk);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	988 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	989 if (gen->save_ram) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	990 memset(gen->save_ram, 0, size);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	991 FILE * f = fopen(sram_filename, "rb");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	992 if (f) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	993 uint32_t read = fread(gen->save_ram, 1, size, f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	994 fclose(f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	995 if (read > 0) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	996 printf("Loaded SRAM from %s\n", sram_filename);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	997 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	998 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	999 atexit(save_sram);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1000 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1001 init_m68k_opts(&opts, memmap, num_chunks, MCLKS_PER_68K);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1002 opts.address_log = address_log;
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1003 m68k_context *context = init_68k_context(&opts);
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1004 gen->m68k = context;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1005
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1006 context->video_context = gen->vdp;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1007 context->system = gen;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1008 //cartridge ROM
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1009 context->mem_pointers[0] = cart;
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	1010 context->target_cycle = context->sync_cycle = gen->frame_end > gen->max_cycles ? gen->frame_end : gen->max_cycles;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1011 //work RAM
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1012 context->mem_pointers[1] = ram;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1013 //save RAM/map
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1014 context->mem_pointers[2] = initial_mapped;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1015 context->mem_pointers[3] = (uint16_t *)gen->save_ram;
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1016 uint32_t address;
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1017 address = cart[2] << 16 \| cart[3];
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1018 translate_m68k_stream(address, context);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1019 if (statefile) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1020 uint32_t pc = load_gst(gen, statefile);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1021 if (!pc) {
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1022 fprintf(stderr, "Failed to load save state %s\n", statefile);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1023 exit(1);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1024 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1025 printf("Loaded %s\n", statefile);
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1026 if (debugger) {
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1027 insert_breakpoint(context, pc, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1028 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	1029 adjust_int_cycle(gen->m68k, gen->vdp);
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1030 start_68k_context(context, pc);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1031 } else {
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1032 if (debugger) {
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1033 insert_breakpoint(context, address, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1034 }
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	1035 m68k_reset(context);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1036 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1037 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	1038
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1039 char title[64];
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1040
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1041 #define TITLE_START 0x150
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1042 #define TITLE_END (TITLE_START+48)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1043
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1044 void update_title()
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1045 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1046 uint16_t *last = cart + TITLE_END/2 - 1;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1047 while(last > cart + TITLE_START/2 && *last == 0x2020)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1048 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1049 last--;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1050 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1051 uint16_t *start = cart + TITLE_START/2;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1052 char *cur = title;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1053 char last_char = ' ';
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1054 for (; start != last; start++)
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1055 {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1056 if ((last_char != ' ' \|\| (start >> 8) != ' ') && (start >> 8) < 0x80) {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1057 (cur++) = start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1058 last_char = *start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1059 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1060 if (last_char != ' ' \|\| (start & 0xFF) != ' ' && (start & 0xFF) < 0x80) {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1061 (cur++) = start;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1062 last_char = *start & 0xFF;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1063 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1064 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1065 (cur++) = start >> 8;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1066 if ((*start & 0xFF) != ' ') {
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1067 (cur++) = start;
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1068 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1069 strcpy(cur, " - BlastEm");
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1070 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1071
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1072 #define REGION_START 0x1F0
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1073
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1074 int detect_specific_region(char region)
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1075 {
346 aff29d50afd5 Fix a region detection bug Mike Pavone <pavone@retrodev.com> parents: 345 diff changeset	1076 return (cart[REGION_START/2] & 0xFF) == region \|\| (cart[REGION_START/2] >> 8) == region \|\| (cart[REGION_START/2+1] & 0xFF) == region;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1077 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1078
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1079 void detect_region()
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1080 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1081 if (detect_specific_region('U')\|\| detect_specific_region('B') \|\| detect_specific_region('4')) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1082 version_reg = NO_DISK \| USA;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1083 } else if (detect_specific_region('J')) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1084 version_reg = NO_DISK \| JAP;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	1085 } else if (detect_specific_region('E') \|\| detect_specific_region('A')) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1086 version_reg = NO_DISK \| EUR;
434 f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1087 } else {
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1088 char * def_region = tern_find_ptr(config, "default_region");
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1089 if (def_region) {
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1090 switch(*def_region)
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1091 {
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1092 case 'j':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1093 case 'J':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1094 version_reg = NO_DISK \| JAP;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1095 break;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1096 case 'u':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1097 case 'U':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1098 version_reg = NO_DISK \| USA;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1099 break;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1100 case 'e':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1101 case 'E':
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1102 version_reg = NO_DISK \| EUR;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1103 break;
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1104 }
f0631c85a90b Read default region from config file Mike Pavone <pavone@retrodev.com> parents: 433 diff changeset	1105 }
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1106 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1107 }
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1108 #ifndef NO_Z80
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1109 const memmap_chunk z80_map[] = {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1110 { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL },
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1111 { 0x8000, 0x10000, 0x7FFF, 0, 0, NULL, NULL, NULL, z80_read_bank, z80_write_bank},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1112 { 0x4000, 0x6000, 0x0003, 0, 0, NULL, NULL, NULL, z80_read_ym, z80_write_ym},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1113 { 0x6000, 0x6100, 0xFFFF, 0, 0, NULL, NULL, NULL, NULL, z80_write_bank_reg},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	1114 { 0x7F00, 0x8000, 0x00FF, 0, 0, NULL, NULL, NULL, z80_vdp_port_read, z80_vdp_port_write}
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1115 };
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1116 #endif
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1117
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1118 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1119 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1120 if (argc < 2) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1121 fputs("Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n", stderr);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1122 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1123 }
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	1124 set_exe_str(argv[0]);
6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	1125 config = load_config();
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1126 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1127 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1128 int debug = 0;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1129 int ym_log = 0;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1130 int loaded = 0;
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1131 uint8_t force_version = 0;
5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1132 char * romfname = NULL;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1133 FILE *address_log = NULL;
425 8b3ae850d1c4 Forgot to null initialize the statfile pointer Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	1134 char * statefile = NULL;
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1135 uint8_t * debuggerfun = NULL;
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1136 uint8_t fullscreen = 0, use_gl = 1;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1137 for (int i = 1; i < argc; i++) {
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1138 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1139 switch(argv[i][1]) {
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1140 case 'b':
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1141 i++;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1142 if (i >= argc) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1143 fputs("-b must be followed by a frame count\n", stderr);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1144 return 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1145 }
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1146 headless = 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1147 exit_after = atoi(argv[i]);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	1148 break;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1149 case 'd':
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1150 debuggerfun = (uint8_t *)debugger;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1151 break;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1152 case 'D':
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1153 gdb_remote_init();
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1154 debuggerfun = (uint8_t *)gdb_debug_enter;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1155 break;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	1156 case 'f':
444 cc754a309ead Add fullscreen support and add a keybinding for exiting the emulator Mike Pavone <pavone@retrodev.com> parents: 434 diff changeset	1157 fullscreen = 1;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	1158 break;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1159 case 'g':
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1160 use_gl = 0;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1161 break;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1162 case 'l':
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1163 address_log = fopen("address.log", "w");
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	1164 break;
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1165 case 'v':
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1166 printf("blastem %s\n", BLASTEM_VERSION);
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1167 return 0;
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	1168 break;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1169 case 'n':
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1170 z80_enabled = 0;
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	1171 break;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1172 case 'r':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1173 i++;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1174 if (i >= argc) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1175 fputs("-r must be followed by region (J, U or E)\n", stderr);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1176 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1177 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1178 switch (argv[i][0])
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1179 {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1180 case 'j':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1181 case 'J':
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1182 force_version = NO_DISK \| JAP;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1183 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1184 case 'u':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1185 case 'U':
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1186 force_version = NO_DISK \| USA;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1187 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1188 case 'e':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1189 case 'E':
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1190 force_version = NO_DISK \| EUR;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1191 break;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1192 default:
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1193 fprintf(stderr, "'%c' is not a valid region character for the -r option\n", argv[i][0]);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1194 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1195 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	1196 break;
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1197 case 's':
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1198 i++;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1199 if (i >= argc) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1200 fputs("-s must be followed by a savestate filename\n", stderr);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1201 return 1;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1202 }
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1203 statefile = argv[i];
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	1204 break;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1205 case 'y':
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1206 ym_log = 1;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	1207 break;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1208 case 'h':
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1209 puts(
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1210 "Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1211 "Options:\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1212 " -h Print this help text\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1213 " -r (J\|U\|E) Force region to Japan, US or Europe respectively\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1214 " -f Start in fullscreen mode\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1215 " -g Disable OpenGL rendering\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1216 " -s FILE Load a GST format savestate from FILE\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1217 " -d Enter debugger on startup\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1218 " -n Disable Z80\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1219 " -v Display version number and exit\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1220 " -l Log 68K code addresses (useful for assemblers)\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1221 " -y Log individual YM-2612 channels to WAVE files\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1222 );
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1223 return 0;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1224 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1225 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1226 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1227 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1228 } else if (!loaded) {
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1229 if(!load_rom(argv[i])) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1230 fprintf(stderr, "Failed to open %s for reading\n", argv[i]);
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1231 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1232 }
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1233 romfname = argv[i];
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1234 loaded = 1;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1235 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1236 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1237 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1238 height = atoi(argv[i]);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1239 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1240 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1241 if (!loaded) {
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1242 fputs("You must specify a ROM filename!\n", stderr);
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1243 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1244 }
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1245 if (force_version) {
5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1246 version_reg = force_version;
683 70de0bdf8e97 Move detect_region down so that it once again occurs after load_rom since it won't work before the ROM is loaded Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1247 } else {
70de0bdf8e97 Move detect_region down so that it once again occurs after load_rom since it won't work before the ROM is loaded Michael Pavone <pavone@retrodev.com> parents: 682 diff changeset	1248 detect_region();
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1249 }
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	1250 update_title();
433 ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1251 int def_width = 0;
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1252 char *config_width = tern_find_ptr(config, "videowidth");
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1253 if (config_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1254 def_width = atoi(config_width);
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1255 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1256 if (!def_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1257 def_width = 640;
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1258 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1259 width = width < 320 ? def_width : width;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1260 height = height < 240 ? (width/320) * 240 : height;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1261 uint32_t fps = 60;
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1262 if (version_reg & 0x40) {
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1263 fps = 50;
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1264 }
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1265 if (!headless) {
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1266 render_init(width, height, title, fps, fullscreen, use_gl);
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1267 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1268 vdp_context v_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1269 genesis_context gen;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1270 memset(&gen, 0, sizeof(gen));
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1271 gen.master_clock = gen.normal_clock = fps == 60 ? MCLKS_NTSC : MCLKS_PAL;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1272
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1273 init_vdp_context(&v_context, version_reg & 0x40);
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	1274 gen.frame_end = vdp_cycles_to_frame_end(&v_context);
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	1275 char * config_cycles = tern_find_ptr(config, "clocksmax_cycles");
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	1276 gen.max_cycles = config_cycles ? atoi(config_cycles) : 10000000;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1277
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1278 ym2612_context y_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1279 ym_init(&y_context, render_sample_rate(), gen.master_clock, MCLKS_PER_YM, render_audio_buffer(), ym_log ? YM_OPT_WAVE_LOG : 0);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1280
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1281 psg_context p_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1282 psg_init(&p_context, render_sample_rate(), gen.master_clock, MCLKS_PER_PSG, render_audio_buffer());
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1283
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1284 z80_context z_context;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1285 #ifndef NO_Z80
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1286 z80_options z_opts;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1287 init_z80_opts(&z_opts, z80_map, 5, MCLKS_PER_Z80);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1288 init_z80_context(&z_context, &z_opts);
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	1289 z80_assert_reset(&z_context, 0);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1290 #endif
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1291
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1292 z_context.system = &gen;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1293 z_context.mem_pointers[0] = z80_ram;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1294 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1295
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1296 gen.z80 = &z_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1297 gen.vdp = &v_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1298 gen.ym = &y_context;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1299 gen.psg = &p_context;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1300 genesis = &gen;
693 318ebe078315 Fix missing call to setup_io_devices Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	1301 setup_io_devices(config, gen.ports);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1302
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1303 int fname_size = strlen(romfname);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1304 sram_filename = malloc(fname_size+6);
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1305 memcpy(sram_filename, romfname, fname_size);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1306 int i;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1307 for (i = fname_size-1; fname_size >= 0; --i) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1308 if (sram_filename[i] == '.') {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1309 strcpy(sram_filename + i + 1, "sram");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1310 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1311 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1312 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1313 if (i < 0) {
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1314 strcpy(sram_filename + fname_size, ".sram");
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1315 }
645 d77c79cec800 Initial support for configurable IO, custom IO and sega transfer board emulation Michael Pavone <pavone@retrodev.com> parents: 628 diff changeset	1316 set_keybindings(gen.ports);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1317
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	1318 init_run_cpu(&gen, address_log, statefile, debuggerfun);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1319 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1320 }

Mercurial > repos > blastem

annotate blastem.c @ 718:eaba6789f316