# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1549740871 28800
# Node ID 01236179fc7190a9a07fc7489e358693d07f8365
# Parent  e4fe5a450d054ec86e31cad154f1809ba2de720b
Optimization to memory access in new Z80 core

diff -r e4fe5a450d05 -r 01236179fc71 cpu_dsl.py
--- a/cpu_dsl.py	Fri Feb 08 23:09:58 2019 -0800
+++ b/cpu_dsl.py	Sat Feb 09 11:34:31 2019 -0800
@@ -1032,8 +1032,8 @@
 	def addReg(self, name, size):
 		self.regs[name] = size
 		
-	def addPointer(self, name, size):
-		self.pointers[name] = size
+	def addPointer(self, name, size, count):
+		self.pointers[name] = (size, count)
 	
 	def addRegArray(self, name, size, regs):
 		self.regArrays[name] = (size, regs)
@@ -1070,12 +1070,15 @@
 	
 	def processLine(self, parts):
 		if len(parts) == 3:
-			self.addRegArray(parts[0], int(parts[1]), int(parts[2]))
+			if parts[1].startswith('ptr'):
+				self.addPointer(parts[0], parts[1][3:], int(parts[2]))
+			else:
+				self.addRegArray(parts[0], int(parts[1]), int(parts[2]))
 		elif len(parts) > 2:
 			self.addRegArray(parts[0], int(parts[1]), parts[2:])
 		else:
 			if parts[1].startswith('ptr'):
-				self.addPointer(parts[0], parts[1][3:])
+				self.addPointer(parts[0], parts[1][3:], 1)
 			else:
 				self.addReg(parts[0], int(parts[1]))
 		return self
@@ -1084,13 +1087,17 @@
 		fieldList = []
 		for pointer in self.pointers:
 			stars = '*'
-			ptype = self.pointers[pointer]
+			ptype, count = self.pointers[pointer]
 			while ptype.startswith('ptr'):
 				stars += '*'
 				ptype = ptype[3:]
 			if ptype.isdigit():
 				ptype = 'uint{sz}_t'.format(sz=ptype)
-			hFile.write('\n\t{ptype} {stars}{nm};'.format(nm=pointer, ptype=ptype, stars=stars))
+			if count > 1:
+				arr = '[{n}]'.format(n=count)
+			else:
+				arr = ''
+			hFile.write('\n\t{ptype} {stars}{nm}{arr};'.format(nm=pointer, ptype=ptype, stars=stars, arr=arr))
 		for reg in self.regs:
 			if not self.isRegArrayMember(reg):
 				fieldList.append((self.regs[reg], 1, reg))
diff -r e4fe5a450d05 -r 01236179fc71 z80.cpu
--- a/z80.cpu	Fri Feb 08 23:09:58 2019 -0800
+++ b/z80.cpu	Sat Feb 09 11:34:31 2019 -0800
@@ -34,6 +34,7 @@
 	io_map ptrmemmap_chunk
 	io_chunks 32
 	io_mask 32
+	fastmem ptr8 64
 	
 flags
 	register f
diff -r e4fe5a450d05 -r 01236179fc71 z80_util.c
--- a/z80_util.c	Fri Feb 08 23:09:58 2019 -0800
+++ b/z80_util.c	Sat Feb 09 11:34:31 2019 -0800
@@ -3,13 +3,23 @@
 void z80_read_8(z80_context *context)
 {
 	context->cycles += 3 * context->opts->gen.clock_divider;
-	context->scratch1 = read_byte(context->scratch1, NULL, &context->opts->gen, context);
+	uint8_t *fast = context->fastmem[context->scratch1 >> 10];
+	if (fast) {
+		context->scratch1 = fast[context->scratch1 & 0x3FF];
+	} else {
+		context->scratch1 = read_byte(context->scratch1, NULL, &context->opts->gen, context);
+	}
 }
 
 void z80_write_8(z80_context *context)
 {
 	context->cycles += 3 * context->opts->gen.clock_divider;
-	write_byte(context->scratch2, context->scratch1, NULL, &context->opts->gen, context);
+	uint8_t *fast = context->fastmem[context->scratch2 >> 10];
+	if (fast) {
+		fast[context->scratch2 & 0x3FF] = context->scratch1;
+	} else {
+		write_byte(context->scratch2, context->scratch1, NULL, &context->opts->gen, context);
+	}
 }
 
 void z80_io_read8(z80_context *context)
@@ -69,6 +79,16 @@
 	context->io_map = (memmap_chunk *)tmp_io_chunks;
 	context->io_chunks = tmp_num_io_chunks;
 	context->io_mask = tmp_io_mask;
+	for(uint32_t address = 0; address < 0x10000; address+=1024)
+	{
+		uint8_t *start = get_native_pointer(address, NULL, &options->gen);
+		if (start) {
+			uint8_t *end = get_native_pointer(address + 1023, NULL, &options->gen);
+			if (end && end - start == 1023) {
+				context->fastmem[address >> 10] = start;
+			}
+		}
+	}
 	return context;
 }