# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1484708473 28800
# Node ID 0928b68fef2ac0b48b73a91850f72a6bb59f87f5
# Parent  e2b81a0f8fd89a1f9f114b1da541c1efcb9a5f70
Update gst loader to deal with VDP changes

diff -r e2b81a0f8fd8 -r 0928b68fef2a gst.c
--- a/gst.c	Tue Jan 17 19:01:04 2017 -0800
+++ b/gst.c	Tue Jan 17 19:01:13 2017 -0800
@@ -222,11 +222,14 @@
 {
 	uint8_t tmp_buf[VRAM_SIZE];
 	fseek(state_file, GST_VDP_REGS, SEEK_SET);
-	if (fread(context->regs, 1, VDP_REGS, state_file) != VDP_REGS) {
+	if (fread(tmp_buf, 1, VDP_REGS, state_file) != VDP_REGS) {
 		fputs("Failed to read VDP registers from savestate\n", stderr);
 		return 0;
 	}
-	context->double_res = (context->regs[REG_MODE_4] & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
+	for (uint16_t i = 0; i < VDP_REGS; i++)
+	{
+		vdp_control_port_write(context, 0x8000 | (i << 8) | tmp_buf[i]);
+	}
 	latch_mode(context);
 	if (fread(tmp_buf, 1, CRAM_SIZE*2, state_file) != CRAM_SIZE*2) {
 		fputs("Failed to read CRAM from savestate\n", stderr);
@@ -234,7 +237,7 @@
 	}
 	for (int i = 0; i < CRAM_SIZE; i++) {
 		uint16_t value;
-		write_cram(context, i, (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]);
+		write_cram(context, i*2, (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]);
 	}
 	if (fread(tmp_buf, 2, VSRAM_SIZE, state_file) != VSRAM_SIZE) {
 		fputs("Failed to read VSRAM from savestate\n", stderr);