# HG changeset patch # User Mike Pavone # Date 1356882764 28800 # Node ID 0969d8363a204d88984956c3a1c1af8ab3a22934 # Parent 8fc8e46be691c66760802038802140bff47d0f4c Support more address modes for jmp diff -r 8fc8e46be691 -r 0969d8363a20 m68k_to_x86.c --- a/m68k_to_x86.c Sun Dec 30 01:15:16 2012 -0800 +++ b/m68k_to_x86.c Sun Dec 30 07:52:44 2012 -0800 @@ -1520,7 +1520,7 @@ uint8_t * translate_m68k_jmp(uint8_t * dst, m68kinst * inst, x86_68k_options * opts) { - uint8_t * dest_addr; + uint8_t * dest_addr, sec_reg; uint32_t m68k_addr; switch(inst->src.addr_mode) { @@ -1534,6 +1534,50 @@ dst = call(dst, (uint8_t *)m68k_native_addr); dst = jmp_r(dst, SCRATCH1); break; + case MODE_AREG_INDEX_DISP8: + dst = cycles(dst, BUS*3);//TODO: CHeck that this is correct + if (opts->aregs[inst->src.params.regs.pri] >= 0) { + dst = mov_rr(dst, opts->aregs[inst->src.params.regs.pri], SCRATCH1, SZ_D); + } else { + dst = mov_rdisp8r(dst, CONTEXT, reg_offset(&(inst->src)), SCRATCH1, SZ_D); + } + sec_reg = (inst->src.params.regs.sec >> 1) & 0x7; + if (inst->src.params.regs.sec & 1) { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + dst = add_rr(dst, opts->aregs[sec_reg], SCRATCH1, SZ_D); + } else { + dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + dst = add_rr(dst, opts->dregs[sec_reg], SCRATCH1, SZ_D); + } else { + dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } + } else { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + dst = movsx_rr(dst, opts->aregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + dst = movsx_rr(dst, opts->dregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } + dst = add_rr(dst, SCRATCH2, SCRATCH1, SZ_D); + } + if (inst->src.params.regs.displacement) { + dst = add_ir(dst, inst->src.params.regs.displacement, SCRATCH1, SZ_D); + } + dst = call(dst, (uint8_t *)m68k_native_addr); + dst = jmp_r(dst, SCRATCH1); + break; case MODE_PC_DISPLACE: dst = cycles(dst, 10); m68k_addr = inst->src.params.regs.displacement + inst->address + 2; @@ -1551,6 +1595,46 @@ dst = jmp_r(dst, SCRATCH1); } break; + case MODE_PC_INDEX_DISP8: + dst = cycles(dst, BUS*3);//TODO: CHeck that this is correct + dst = mov_ir(dst, inst->address+2, SCRATCH1, SZ_D); + sec_reg = (inst->src.params.regs.sec >> 1) & 0x7; + if (inst->src.params.regs.sec & 1) { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + dst = add_rr(dst, opts->aregs[sec_reg], SCRATCH1, SZ_D); + } else { + dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + dst = add_rr(dst, opts->dregs[sec_reg], SCRATCH1, SZ_D); + } else { + dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } + } else { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + dst = movsx_rr(dst, opts->aregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + dst = movsx_rr(dst, opts->dregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } + dst = add_rr(dst, SCRATCH2, SCRATCH1, SZ_D); + } + if (inst->src.params.regs.displacement) { + dst = add_ir(dst, inst->src.params.regs.displacement, SCRATCH1, SZ_D); + } + dst = call(dst, (uint8_t *)m68k_native_addr); + dst = jmp_r(dst, SCRATCH1); + break; case MODE_ABSOLUTE: case MODE_ABSOLUTE_SHORT: dst = cycles(dst, inst->src.addr_mode == MODE_ABSOLUTE ? 12 : 10);