# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1708844076 28800
# Node ID 0ca78837e4d29643483fe8e3842fb9fdc7430685
# Parent  bf8a77a8ddc41f414bf92a95c5066d8cf8656ae3
Implement ext instruction in new 68K core

diff -r bf8a77a8ddc4 -r 0ca78837e4d2 cpu_dsl.py
--- a/cpu_dsl.py	Sat Feb 24 21:07:38 2024 -0800
+++ b/cpu_dsl.py	Sat Feb 24 22:54:36 2024 -0800
@@ -712,6 +712,7 @@
 		fmt = '\n\t{dst} = {src} & 0x80 ? {src} | 0xFF00 : {src} & 0x7F;'
 	else:
 		fmt = '\n\t{dst} = {src} & 0x8000 ? {src} | 0xFFFF0000 : {src} & 0x7FFF;'
+	prog.lastSize = params[0]
 	return fmt.format(src=params[1], dst=params[2])
 	
 def _getCarryCheck(prog):
diff -r bf8a77a8ddc4 -r 0ca78837e4d2 m68k.cpu
--- a/m68k.cpu	Sat Feb 24 21:07:38 2024 -0800
+++ b/m68k.cpu	Sat Feb 24 22:54:36 2024 -0800
@@ -1710,6 +1710,18 @@
 	m68k_save_dst Z
 	m68k_prefetch
 
+01001000ZZ000RRR ext
+	invalid Z 0
+	invalid Z 1
+	if Z = 3
+		meta bits 32
+	else
+		meta bits 16
+	end
+	sext bits dregs.R dregs.R
+	update_flags NZV0C0
+	m68k_prefetch
+
 0100111001110000 reset
 	if reset_handler
 	pcall reset_handler m68k_reset_handler context