# HG changeset patch
# User Mike Pavone <pavone@retrodev.com>
# Date 1368996467 25200
# Node ID 29d2ca563499d8516a57b288b136d94b4416c0c1
# Parent  b467711354420cfc42723c3bf816430addaaebca
Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall.

diff -r b46771135442 -r 29d2ca563499 blastem.c
--- a/blastem.c	Sun May 19 11:38:15 2013 -0700
+++ b/blastem.c	Sun May 19 13:47:47 2013 -0700
@@ -253,8 +253,8 @@
 	vdp_context * v_context = context->video_context;
 	if (vdp_port < 0x10) {
 		int blocked;
+		uint32_t before_cycle = v_context->cycles;
 		if (vdp_port < 4) {
-			uint32_t before_cycle = v_context->cycles;
 			while (vdp_data_port_write(v_context, value) < 0) {
 				while(v_context->flags & FLAG_DMA_RUN) {
 					vdp_run_dma_done(v_context, mclks_per_frame);
@@ -314,7 +314,9 @@
 			printf("Illegal write to HV Counter port %X\n", vdp_port);
 			exit(1);
 		}
-		context->current_cycle = v_context->cycles/MCLKS_PER_68K;
+		if (v_context->cycles != before_cycle) {
+			context->current_cycle = v_context->cycles / MCLKS_PER_68K;
+		}
 	} else if (vdp_port < 0x18) {
 		//TODO: Implement PSG
 	} else {