# HG changeset patch
# User Mike Pavone <pavone@retrodev.com>
# Date 1356572099 28800
# Node ID 2d1ae596db7a8e4ebb21f28a18a8950bdac0d945
# Parent  2c7267617d7170072d61dc67ac22e7f38e5250e8
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.

diff -r 2c7267617d71 -r 2d1ae596db7a runtime.S
--- a/runtime.S	Wed Dec 26 17:06:34 2012 -0800
+++ b/runtime.S	Wed Dec 26 17:34:59 2012 -0800
@@ -154,7 +154,7 @@
 	call io_read_w
 	mov %rax, %rsi
 	call m68k_load_context
-	mov 136(%rsi), %cl
+	mov 136(%rsi), %cx
 	ret
 	
 bad_access_msg:
@@ -333,7 +333,9 @@
 	mov %cx, %di
 	pop %rcx
 	add $2, %ecx
+	push %rdi
 	call m68k_read_word_scratch1
+	pop %rdi
 	and $0xFFFF, %ecx
 	shl $16, %edi
 	or %edi, %ecx
diff -r 2c7267617d71 -r 2d1ae596db7a vdp.c
--- a/vdp.c	Wed Dec 26 17:06:34 2012 -0800
+++ b/vdp.c	Wed Dec 26 17:34:59 2012 -0800
@@ -313,7 +313,7 @@
 					}
 					break;
 				case CRAM_WRITE:
-					//printf("CRAM Write: %X to %X\n", start->value, context->address);
+					printf("CRAM Write: %X to %X, autoinc: %d\n", start->value, context->address, context->regs[REG_AUTOINC]);
 					context->cram[(context->address/2) & (CRAM_SIZE-1)] = start->value;
 					break;
 				case VSRAM_WRITE:
@@ -1029,7 +1029,7 @@
 		context->address = (context->address & 0x3FFF) | (value << 14);
 		context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C);
 		context->flags &= ~FLAG_PENDING;
-		//printf("New Address: %X, New CD: %X\n", context->address, context->cd);
+		printf("New Address: %X, New CD: %X\n", context->address, context->cd);
 		if (context->cd & 0x20) {
 			if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) {
 				//DMA copy or 68K -> VDP, transfer starts immediately