# HG changeset patch # User Michael Pavone # Date 1419651479 28800 # Node ID 39d7d463ed5b0cce67e0858afab459d6abe86898 # Parent 8c7b63f9fab810da055a80652b4e216b9aa40dcd Get Z80 banked access sort of working again diff -r 8c7b63f9fab8 -r 39d7d463ed5b backend.h --- a/backend.h Fri Dec 26 19:36:41 2014 -0800 +++ b/backend.h Fri Dec 26 19:37:59 2014 -0800 @@ -79,7 +79,7 @@ #define MMAP_ONLY_ODD 0x10 #define MMAP_ONLY_EVEN 0x20 #define MMAP_FUNC_NULL 0x40 -#define MMAP_CUSTOM 0x80 +#define MMAP_BYTESWAP 0x80 typedef uint16_t (*read_16_fun)(uint32_t address, void * context); typedef uint8_t (*read_8_fun)(uint32_t address, void * context); diff -r 8c7b63f9fab8 -r 39d7d463ed5b backend_x86.c --- a/backend_x86.c Fri Dec 26 19:36:41 2014 -0800 +++ b/backend_x86.c Fri Dec 26 19:37:59 2014 -0800 @@ -84,7 +84,7 @@ default: cfun = NULL; } - if(memmap[chunk].buffer && memmap[chunk].flags & access_flag) { + if(memmap[chunk].flags & access_flag) { if (memmap[chunk].flags & MMAP_PTR_IDX) { if (memmap[chunk].flags & MMAP_FUNC_NULL) { cmp_irdisp(code, 0, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, SZ_PTR); @@ -133,7 +133,7 @@ *not_null = code->cur - (not_null + 1); } - if (opts->byte_swap && size == SZ_B) { + if ((opts->byte_swap || memmap[chunk].flags & MMAP_BYTESWAP) && size == SZ_B) { xor_ir(code, 1, adr_reg, opts->address_size); } if (opts->address_size != SZ_D) { @@ -159,7 +159,7 @@ retn(code); *good_addr = code->cur - (good_addr + 1); shr_ir(code, 1, adr_reg, opts->address_size); - } else if (opts->byte_swap) { + } else if (opts->byte_swap || memmap[chunk].flags & MMAP_BYTESWAP) { xor_ir(code, 1, adr_reg, opts->address_size); } } else if ((memmap[chunk].flags & MMAP_ONLY_ODD) || (memmap[chunk].flags & MMAP_ONLY_EVEN)) { diff -r 8c7b63f9fab8 -r 39d7d463ed5b blastem.c --- a/blastem.c Fri Dec 26 19:36:41 2014 -0800 +++ b/blastem.c Fri Dec 26 19:37:59 2014 -0800 @@ -731,14 +731,35 @@ uint8_t z80_read_bank(uint32_t location, void * vcontext) { z80_context * context = vcontext; - //TODO: Implement me + uint32_t address = context->bank_reg << 15 | location; + fprintf(stderr, "Unhandled read by Z80 from address %X through banked memory area\n", address); return 0; } void *z80_write_bank(uint32_t location, void * vcontext, uint8_t value) { z80_context * context = vcontext; - //TODO: Implement me + uint32_t address = context->bank_reg << 15 | location; + if (address >= 0xE00000) { + address &= 0xFFFF; + ((uint8_t *)ram)[address ^ 1] = value; + } else { + fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address); + } + return context; +} + +void *z80_write_bank_reg(uint32_t location, void * vcontext, uint8_t value) +{ + z80_context * context = vcontext; + + context->bank_reg = (context->bank_reg >> 1 | value << 8) & 0x1FF; + if (context->bank_reg < 0x80) { + context->mem_pointers[1] = context->mem_pointers[2] + (context->bank_reg << 15); + } else { + context->mem_pointers[1] = NULL; + } + return context; } @@ -1121,11 +1142,11 @@ } #ifndef NO_Z80 const memmap_chunk z80_map[] = { - { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ | MMAP_WRITE | MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL }, - { 0x8000, 0x10000, 0xFFFF, 1, MMAP_READ | MMAP_WRITE | MMAP_PTR_IDX | MMAP_FUNC_NULL, NULL, NULL, NULL, z80_read_bank, z80_write_bank}, - { 0x4000, 0x6000, 0x0003, 0, MMAP_READ | MMAP_WRITE, NULL, NULL, NULL, z80_read_ym, z80_write_ym}, - { 0x6000, 0x6100, 0xFFFF, 0, MMAP_WRITE | MMAP_CUSTOM, NULL, NULL, NULL, NULL, (write_8_fun)z80_gen_bank_write}, - { 0x7F00, 0x8000, 0x00FF, 0, MMAP_READ | MMAP_WRITE, NULL, NULL, NULL, z80_vdp_port_read, z80_vdp_port_write} + { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ | MMAP_WRITE | MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL }, + { 0x8000, 0x10000, 0xFFFF, 1, MMAP_READ | MMAP_PTR_IDX | MMAP_FUNC_NULL | MMAP_BYTESWAP, NULL, NULL, NULL, z80_read_bank, z80_write_bank}, + { 0x4000, 0x6000, 0x0003, 0, 0, NULL, NULL, NULL, z80_read_ym, z80_write_ym}, + { 0x6000, 0x6100, 0xFFFF, 0, 0, NULL, NULL, NULL, NULL, z80_write_bank_reg}, + { 0x7F00, 0x8000, 0x00FF, 0, 0, NULL, NULL, NULL, z80_vdp_port_read, z80_vdp_port_write} }; #endif