# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1738485118 28800
# Node ID 3d14db924e5714b68272f3881fd93c1443160e2b
# Parent  882ceef923e02146c8417be03bdf1144c2a9d7bd
DMA fill and copy should not block VDP data or control port writes

diff -r 882ceef923e0 -r 3d14db924e57 genesis.c
--- a/genesis.c	Sat Feb 01 23:22:37 2025 -0800
+++ b/genesis.c	Sun Feb 02 00:31:58 2025 -0800
@@ -994,28 +994,7 @@
 	if (vdp_port < 0x10) {
 		int blocked;
 		if (vdp_port < 4) {
-			while (vdp_data_port_write(v_context, value) < 0) {
-				while(v_context->flags & FLAG_DMA_RUN) {
-					did_dma = 1;
-					vdp_run_dma_done(v_context, gen->frame_end);
-					if (v_context->cycles >= gen->frame_end) {
-						uint32_t cycle_diff = v_context->cycles - context->cycles;
-						uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K;
-						if (m68k_cycle_diff < cycle_diff) {
-							m68k_cycle_diff += MCLKS_PER_68K;
-						}
-						context->cycles += m68k_cycle_diff;
-						gen->bus_busy = 1;
-						if (gen->header.type == SYSTEM_PICO || gen->header.type == SYSTEM_COPERA) {
-							sync_components_pico(context, 0);
-						} else {
-							sync_components(context, 0);
-						}
-						gen->bus_busy = 0;
-					}
-				}
-				//context->cycles = v_context->cycles;
-			}
+			vdp_data_port_write(v_context, value);
 		} else if(vdp_port < 8) {
 			vdp_run_context_full(v_context, context->cycles);
 			before_cycle = v_context->cycles;
diff -r 882ceef923e0 -r 3d14db924e57 vdp.c
--- a/vdp.c	Sat Feb 01 23:22:37 2025 -0800
+++ b/vdp.c	Sun Feb 02 00:31:58 2025 -0800
@@ -4966,9 +4966,6 @@
 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle)
 {
 	//printf("control port write: %X at %d\n", value, context->cycles);
-	if (context->flags & FLAG_DMA_RUN) {
-		return -1;
-	}
 	if (context->flags & FLAG_PENDING) {
 		context->address_latch = value << 14 & 0x1C000;
 		context->address = (context->address & 0x3FFF) | context->address_latch;
@@ -5056,12 +5053,9 @@
 	}
 }
 
-int vdp_data_port_write(vdp_context * context, uint16_t value)
+void vdp_data_port_write(vdp_context * context, uint16_t value)
 {
 	//printf("data port write: %X at %d\n", value, context->cycles);
-	if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
-		return -1;
-	}
 	if (context->flags & FLAG_PENDING) {
 		context->flags &= ~FLAG_PENDING;
 		//Should these be cleared here?
@@ -5095,7 +5089,6 @@
 	}
 	context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
 	increment_address(context);
-	return 0;
 }
 
 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
diff -r 882ceef923e0 -r 3d14db924e57 vdp.h
--- a/vdp.h	Sat Feb 01 23:22:37 2025 -0800
+++ b/vdp.h	Sun Feb 02 00:31:58 2025 -0800
@@ -287,7 +287,7 @@
 uint8_t vdp_save_gst(vdp_context * context, FILE * outfile);
 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle);
 void vdp_control_port_write_pbc(vdp_context * context, uint8_t value);
-int vdp_data_port_write(vdp_context * context, uint16_t value);
+void vdp_data_port_write(vdp_context * context, uint16_t value);
 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value);
 void vdp_test_port_write(vdp_context * context, uint16_t value);
 uint16_t vdp_control_port_read(vdp_context * context);