# HG changeset patch
# User Mike Pavone <pavone@retrodev.com>
# Date 1379556654 25200
# Node ID 4b24260125f3ad6d19de3aa9d430923d0ed239f1
# Parent  1f3450d1129f559921fb53ec6a21dcc3754fadf7
Theoretically more correct timing of Z80 bus request

diff -r 1f3450d1129f -r 4b24260125f3 blastem.c
--- a/blastem.c	Tue Sep 17 19:10:00 2013 -0700
+++ b/blastem.c	Wed Sep 18 19:10:54 2013 -0700
@@ -517,7 +517,6 @@
 			}
 		} else {
 			if (location == 0x1100) {
-				sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K);
 				if (busack_cycle <= context->current_cycle) {
 					busack = new_busack;
 					busack_cycle = CYCLE_NEVER;
@@ -526,11 +525,13 @@
 					dputs("bus requesting Z80");
 
 					if(!reset && !busreq) {
-						busack_cycle = ((gen->z80->current_cycle + Z80_ACK_DELAY) * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY;
+						sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K + Z80_ACK_DELAY*MCLKS_PER_Z80);
+						busack_cycle = (gen->z80->current_cycle * MCLKS_PER_Z80) / MCLKS_PER_68K;//context->current_cycle + Z80_ACK_DELAY;
 						new_busack = Z80_REQ_ACK;
 					}
 					busreq = 1;
 				} else {
+					sync_z80(gen->z80, context->current_cycle * MCLKS_PER_68K);
 					if (busreq) {
 						dputs("releasing z80 bus");
 						#ifdef DO_DEBUG_PRINT