# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1647197347 25200
# Node ID 4c9e447aa25b75f28f07ec43a9b3f0211bcf9701
# Parent  b0dcf5c9f353c759b5f15039e464b6886ad15e5f
Pause word RAM DMA while word RAM is switched to main CPU

diff -r b0dcf5c9f353 -r 4c9e447aa25b segacd.c
--- a/segacd.c	Sun Mar 13 11:36:06 2022 -0700
+++ b/segacd.c	Sun Mar 13 11:49:07 2022 -0700
@@ -920,7 +920,9 @@
 			m68k_invalidate_code_range(cd->m68k, 0x0C0000 + dma_addr - 1, 0x0C0000 + dma_addr + 1);
 		} else {
 			//2M mode, check if Sub CPU has access
-			if (!(cd->gate_array[GA_MEM_MODE] & BIT_RET)) {
+			if (cd->main_has_word2m) {
+				return 0;
+			} else {
 				cd_graphics_run(cd, cd->cdc.cycle);
 				dma_addr &= (1 << 18) - 1;
 				cd->word_ram[dma_addr >> 1] = cd->gate_array[GA_CDC_HOST_DATA];
@@ -1196,6 +1198,11 @@
 				cd->gate_array[reg] &= ~BIT_RET;
 				cd->main_has_word2m = 0;
 
+				uint16_t dst = cd->gate_array[GA_CDC_CTRL] >> 8 & 0x7;
+				if (dst == DST_WORD_RAM) {
+					lc8951_resume_transfer(&cd->cdc, cd->cdc.cycle);
+				}
+
 				m68k_invalidate_code_range(m68k, cd->base + 0x200000, cd->base + 0x240000);
 				m68k_invalidate_code_range(cd->m68k, 0x080000, 0x0C0000);
 			}