# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1537893360 25200
# Node ID 5e04f9f8bd850cc58a8b61149adf133da063c302
# Parent  8c78543c4783a47615bbb292faf7f8e82082fe09
Add missing end in svp_ram_read. Fix alu_ram_indirect

diff -r 8c78543c4783 -r 5e04f9f8bd85 svp.cpu
--- a/svp.cpu	Tue Sep 25 09:33:46 2018 -0700
+++ b/svp.cpu	Tue Sep 25 09:36:00 2018 -0700
@@ -103,6 +103,7 @@
 	else
 		sub 1 reg reg
 	end
+	end
 	
 	and 255 idx idx
 	meta val bank.idx
@@ -270,9 +271,9 @@
 	invalid P 0
 	invalid P 2
 	svp_ram_read M B R
-	svp_prog_ram_read scratch1
+	svp_prog_ram_read val
 	local tmp 32
-	lsl val 16 tmp
+	lsl scratch1 16 tmp
 	
 	switch P
 	case 1