# HG changeset patch # User Michael Pavone # Date 1494514870 25200 # Node ID 5ee19c72fa958beb5c0f27995f9b407056e0f8ea # Parent 4d16c09210fd97aadb6878a808333b63b6680f9d Fix regression in mode 4 introduced when advance_output_line was added diff -r 4d16c09210fd -r 5ee19c72fa95 vdp.c --- a/vdp.c Thu May 11 07:51:28 2017 -0700 +++ b/vdp.c Thu May 11 08:01:10 2017 -0700 @@ -1972,6 +1972,7 @@ context->cycles += slot_cycles;\ if ((slot+1) == LINE_CHANGE_MODE4) {\ vdp_advance_line(context);\ + advance_output_line(context);\ if (context->vcounter == 192) {\ return;\ }\