# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1672067849 28800
# Node ID 6677afe78a6f1339837a79a7f681b5f80524bce9
# Parent  5b308c7b098c2beae2458bfe15c11215daa2c610
Hopefully make older versions of gcc happy

diff -r 5b308c7b098c -r 6677afe78a6f backend_x86.c
--- a/backend_x86.c	Sun Dec 25 18:16:44 2022 -0800
+++ b/backend_x86.c	Mon Dec 26 07:17:29 2022 -0800
@@ -81,8 +81,9 @@
 		cmp_rr(code, opts->cycles, opts->limit, SZ_D);
 		cc = CC_A;
 	}
+	code_ptr jmp_off;
 ALLOC_CODE_RETRY_POINT
-	code_ptr jmp_off = code->cur+1;
+	jmp_off = code->cur+1;
 	jcc(code, cc, jmp_off+1);
 	call(code, opts->handle_cycle_limit);
 	CHECK_BRANCH_DEST(jmp_off);
diff -r 5b308c7b098c -r 6677afe78a6f m68k_core_x86.c
--- a/m68k_core_x86.c	Sun Dec 25 18:16:44 2022 -0800
+++ b/m68k_core_x86.c	Mon Dec 26 07:17:29 2022 -0800
@@ -361,8 +361,9 @@
 		cmp_rr(code, opts->gen.cycles, opts->gen.limit, SZ_D);
 		cc = CC_A;
 	}
+	code_ptr jmp_off;
 ALLOC_CODE_RETRY_POINT
-	code_ptr jmp_off = code->cur+1;
+	jmp_off = code->cur+1;
 	jcc(code, cc, jmp_off+1);
 	call(code, opts->handle_int_latch);
 	CHECK_BRANCH_DEST(jmp_off)
@@ -866,8 +867,9 @@
 		}
 	} else {
 		uint8_t cc = m68k_eval_cond(opts, cond);
+		code_ptr true_off;
 ALLOC_CODE_RETRY_POINT
-		code_ptr true_off = code->cur + 1;
+		true_off = code->cur + 1;
 		jcc(code, cc, code->cur+2);
 		cycles(&opts->gen, BUS);
 		if (dst_op.mode == MODE_REG_DIRECT) {
@@ -1351,8 +1353,9 @@
 	if (inst->dst.addr_mode != MODE_AREG || inst->op == M68K_CMP) {
 		update_flags(opts, flag_mask);
 		if (inst->op == M68K_ADDX || inst->op == M68K_SUBX) {
+			code_ptr after_flag_set;
 ALLOC_CODE_RETRY_POINT
-			code_ptr after_flag_set = code->cur + 1;
+			after_flag_set = code->cur + 1;
 			jcc(code, CC_Z, code->cur + 2);
 			set_flag(opts, 0, FLAG_Z);
 			CHECK_BRANCH_DEST(after_flag_set);
@@ -1725,8 +1728,9 @@
 	default:
 		isize = 2;
 	}
+	code_ptr passed;
 ALLOC_CODE_RETRY_POINT
-	code_ptr passed = code->cur + 1;
+	passed = code->cur + 1;
 	jcc(code, CC_GE, code->cur + 2);
 	set_flag(opts, 1, FLAG_N);
 	mov_ir(code, VECTOR_CHK, opts->gen.scratch2, SZ_D);
@@ -1898,8 +1902,9 @@
 		shl_ir(code, 16, opts->gen.scratch1, SZ_D);
 	}
 	cmp_ir(code, 0, opts->gen.scratch1, SZ_D);
+	code_ptr not_zero;
 ALLOC_CODE_RETRY_POINT
-	code_ptr not_zero = code->cur+1;
+	not_zero = code->cur+1;
 	jcc(code, CC_NZ, not_zero);
 
 	//TODO: Check that opts->trap includes the cycles conumed by the first trap0 microinstruction