# HG changeset patch # User Michael Pavone # Date 1493270172 25200 # Node ID 69c25e1188e53ab4f199b97054648c76f0354545 # Parent 87bbc4bec95800cca1a2159985c040552e576b15 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 diff -r 87bbc4bec958 -r 69c25e1188e5 genesis.c --- a/genesis.c Wed Apr 26 21:55:12 2017 -0700 +++ b/genesis.c Wed Apr 26 22:16:12 2017 -0700 @@ -1045,7 +1045,11 @@ } for (int i = 0; i < VRAM_SIZE; i++) { - write_vram_byte(gen->vdp, i, rand()); + gen->vdp->vdpmem[i] = rand(); + } + for (int i = 0; i < SAT_CACHE_SIZE; i++) + { + gen->vdp->sat_cache[i] = rand(); } for (int i = 0; i < CRAM_SIZE; i++) { diff -r 87bbc4bec958 -r 69c25e1188e5 gst.c --- a/gst.c Wed Apr 26 21:55:12 2017 -0700 +++ b/gst.c Wed Apr 26 22:16:12 2017 -0700 @@ -251,7 +251,8 @@ return 0; } for (int i = 0; i < VRAM_SIZE; i++) { - write_vram_byte(context, i, tmp_buf[i]); + context->vdpmem[i] = tmp_buf[i]; + vdp_check_update_sat_byte(context, i, tmp_buf[i]); } return 1; } diff -r 87bbc4bec958 -r 69c25e1188e5 vdp.c --- a/vdp.c Wed Apr 26 21:55:12 2017 -0700 +++ b/vdp.c Wed Apr 26 22:16:12 2017 -0700 @@ -804,24 +804,22 @@ } } -void write_vram_word(vdp_context *context, uint32_t address, uint8_t value) +static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value) { - if (!(address & 4)) { - uint32_t sat_address = mode5_sat_address(context); - if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { - uint16_t cache_address = address - sat_address; - cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); - context->sat_cache[cache_address] = value >> 8; - context->sat_cache[cache_address^1] = value; + if (context->regs[REG_MODE_2] & BIT_MODE_5) { + if (!(address & 4)) { + uint32_t sat_address = mode5_sat_address(context); + if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { + uint16_t cache_address = address - sat_address; + cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); + context->sat_cache[cache_address] = value >> 8; + context->sat_cache[cache_address^1] = value; + } } } - address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2); - address ^= 1; - //TODO: Support an option to actually have 128KB of VRAM - context->vdpmem[address] = value; } -void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value) +void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value) { if (context->regs[REG_MODE_2] & BIT_MODE_5) { if (!(address & 4)) { @@ -832,6 +830,20 @@ context->sat_cache[cache_address] = value; } } + } +} + +static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value) +{ + address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2); + address ^= 1; + //TODO: Support an option to actually have 128KB of VRAM + context->vdpmem[address] = value; +} + +static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value) +{ + if (context->regs[REG_MODE_2] & BIT_MODE_5) { address &= 0xFFFF; } else { address = mode4_address_map[address & 0x3FFF]; @@ -854,14 +866,19 @@ switch (start->cd & 0xF) { case VRAM_WRITE: - //TODO: Support actually having 128K VRAM as an option if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) == (BIT_128K_VRAM|BIT_MODE_5)) { + vdp_check_update_sat(context, start->address, start->value); write_vram_word(context, start->address, start->value); } else if (start->partial) { //printf("VRAM Write: %X to %X at %d (line %d, slot %d)\n", start->value, start->address ^ 1, context->cycles, context->cycles/MCLKS_LINE, (context->cycles%MCLKS_LINE)/16); - write_vram_byte(context, start->address ^ 1, start->partial == 2 ? start->value >> 8 : start->value); + uint8_t byte = start->partial == 2 ? start->value >> 8 : start->value; + if (start->partial > 1) { + vdp_check_update_sat_byte(context, start->address ^ 1, byte); + } + write_vram_byte(context, start->address ^ 1, byte); } else { //printf("VRAM Write High: %X to %X at %d (line %d, slot %d)\n", start->value >> 8, start->address, context->cycles, context->cycles/MCLKS_LINE, (context->cycles%MCLKS_LINE)/16); + vdp_check_update_sat(context, start->address, start->value); write_vram_byte(context, start->address, start->value >> 8); start->partial = 1; //skip auto-increment and removal of entry from fifo @@ -870,7 +887,7 @@ break; case CRAM_WRITE: { //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); - if (start->partial == 1) { + if (start->partial == 3) { uint16_t val; if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) { val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) | start->value << 8; @@ -887,7 +904,7 @@ case VSRAM_WRITE: if (((start->address/2) & 63) < VSRAM_SIZE) { //printf("VSRAM Write: %X to %X @ vcounter: %d, hslot: %d, cycle: %d\n", start->value, context->address, context->vcounter, context->hslot, context->cycles); - if (start->partial == 1) { + if (start->partial == 3) { if (start->address & 1) { context->vsram[(start->address/2) & 63] &= 0xFF; context->vsram[(start->address/2) & 63] |= start->value << 8; @@ -2744,7 +2761,7 @@ } else { cur->cd = (context->cd & 2) | 1; } - cur->partial = 1; + cur->partial = 3; if (context->fifo_read < 0) { context->fifo_read = context->fifo_write; } diff -r 87bbc4bec958 -r 69c25e1188e5 vdp.h --- a/vdp.h Wed Apr 26 21:55:12 2017 -0700 +++ b/vdp.h Wed Apr 26 22:16:12 2017 -0700 @@ -239,6 +239,6 @@ void latch_mode(vdp_context * context); uint32_t vdp_cycles_to_frame_end(vdp_context * context); void write_cram(vdp_context * context, uint16_t address, uint16_t value); -void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value); +void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value); #endif //VDP_H_