# HG changeset patch # User Mike Pavone # Date 1356241045 28800 # Node ID 6d231dbe75abcbe184e4ce4ef88593ef03839cfc # Parent 7b1e16e981efd779251f9c581774a0adfb4d01e3 Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode diff -r 7b1e16e981ef -r 6d231dbe75ab gen_x86.c --- a/gen_x86.c Fri Dec 21 22:33:24 2012 -0800 +++ b/gen_x86.c Sat Dec 22 21:37:25 2012 -0800 @@ -20,6 +20,7 @@ #define PRE_REX 0x40 #define OP_PUSH 0x50 #define OP_POP 0x58 +#define OP_MOVSXD 0x63 #define PRE_SIZE 0x66 #define OP_JCC 0x70 #define OP_IMMED_ARITH 0x80 @@ -36,12 +37,13 @@ #define OP_CALL 0xE8 #define OP_JMP 0xE9 #define OP_JMP_BYTE 0xEB -#define OP_CALL_EA 0xFF +#define OP_SINGLE_EA 0xFF #define OP2_JCC 0x80 #define OP2_SETCC 0x90 #define OP2_BT 0xA3 #define OP2_BTX_I 0xBA +#define OP2_MOVSX 0xBE #define OP_EX_ADDI 0x0 #define OP_EX_ORI 0x1 @@ -66,6 +68,12 @@ #define OP_EX_BTR 0x6 #define OP_EX_BTC 0x7 +#define OP_EX_INC 0x0 +#define OP_EX_DEC 0x1 +#define OP_EX_CALL_EA 0x2 +#define OP_EX_JMP_EA 0x4 +#define OP_EX_PUSH_EA 0x6 + #define BIT_IMMED_RAX 0x4 #define BIT_DIR 0x2 #define BIT_SIZE 0x1 @@ -863,6 +871,67 @@ return out; } +uint8_t * movsx_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t src_size, uint8_t size) +{ + if (size == SZ_W) { + *(out++) = PRE_SIZE; + } + if (size == SZ_Q || dst >= R8 || src >= R8) { + *out = PRE_REX; + if (size == SZ_Q) { + *out |= REX_QUAD; + } + if (src >= R8) { + *out |= REX_REG_FIELD; + src -= (R8 - X86_R8); + } + if (dst >= R8) { + *out |= REX_RM_FIELD; + dst -= (R8 - X86_R8); + } + out++; + } + if (src_size == SZ_D) { + *(out++) = OP_MOVSXD; + } else { + *(out++) = PRE_2BYTE; + *(out++) = OP2_MOVSX | (src_size == SZ_B ? 0 : BIT_SIZE); + } + *(out++) = MODE_REG_DIRECT | src | (dst << 3); + return out; +} + +uint8_t * movsx_rdisp8r(uint8_t * out, uint8_t src, int8_t disp, uint8_t dst, uint8_t src_size, uint8_t size) +{ + if (size == SZ_W) { + *(out++) = PRE_SIZE; + } + if (size == SZ_Q || dst >= R8 || src >= R8) { + *out = PRE_REX; + if (size == SZ_Q) { + *out |= REX_QUAD; + } + if (src >= R8) { + *out |= REX_REG_FIELD; + src -= (R8 - X86_R8); + } + if (dst >= R8) { + *out |= REX_RM_FIELD; + dst -= (R8 - X86_R8); + } + out++; + } + if (src_size == SZ_D) { + *(out++) = OP_MOVSXD; + } else { + *(out++) = PRE_2BYTE; + *(out++) = OP2_MOVSX | (src_size == SZ_B ? 0 : BIT_SIZE); + } + *(out++) = MODE_REG_DISPLACE8 | src | (dst << 3); + *(out++) = disp; + return out; +} + uint8_t * pushf(uint8_t * out) { *(out++) = OP_PUSHF; @@ -1074,6 +1143,12 @@ return out; } +uint8_t * jmp_r(uint8_t * out, uint8_t dst) +{ + *(out++) = OP_SINGLE_EA; + *(out++) = MODE_REG_DIRECT | dst | (OP_EX_JMP_EA << 3); +} + uint8_t * call(uint8_t * out, uint8_t * fun) { ptrdiff_t disp = fun-(out+5); @@ -1094,6 +1169,12 @@ return out; } +uint8_t * call_r(uint8_t * out, uint8_t dst) +{ + *(out++) = OP_SINGLE_EA; + *(out++) = MODE_REG_DIRECT | dst | (OP_EX_CALL_EA << 3); +} + uint8_t * retn(uint8_t * out) { *(out++) = OP_RETN; diff -r 7b1e16e981ef -r 6d231dbe75ab gen_x86.h --- a/gen_x86.h Fri Dec 21 22:33:24 2012 -0800 +++ b/gen_x86.h Sat Dec 22 21:37:25 2012 -0800 @@ -131,6 +131,8 @@ uint8_t * mov_ir(uint8_t * out, int64_t val, uint8_t dst, uint8_t size); uint8_t * mov_irdisp8(uint8_t * out, int32_t val, uint8_t dst, int8_t disp, uint8_t size); uint8_t * mov_irind(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); +uint8_t * movsx_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t src_size, uint8_t size); +uint8_t * movsx_rdisp8r(uint8_t * out, uint8_t src, int8_t disp, uint8_t dst, uint8_t src_size, uint8_t size); uint8_t * pushf(uint8_t * out); uint8_t * popf(uint8_t * out); uint8_t * push_r(uint8_t * out, uint8_t reg); @@ -143,7 +145,9 @@ uint8_t * bt_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t dst_disp, uint8_t size); uint8_t * jcc(uint8_t * out, uint8_t cc, uint8_t *dest); uint8_t * jmp(uint8_t * out, uint8_t *dest); +uint8_t * jmp_r(uint8_t * out, uint8_t dst); uint8_t * call(uint8_t * out, uint8_t * fun); +uint8_t * call_r(uint8_t * out, uint8_t dst); uint8_t * retn(uint8_t * out); #endif //GEN_X86_H_ diff -r 7b1e16e981ef -r 6d231dbe75ab m68k_to_x86.c --- a/m68k_to_x86.c Fri Dec 21 22:33:24 2012 -0800 +++ b/m68k_to_x86.c Sat Dec 22 21:37:25 2012 -0800 @@ -79,6 +79,7 @@ uint8_t * translate_m68k_src(m68kinst * inst, x86_ea * ea, uint8_t * out, x86_68k_options * opts) { int8_t reg = native_reg(&(inst->src), opts); + uint8_t sec_reg; int32_t dec_amount,inc_amount; if (reg >= 0) { ea->mode = MODE_REG_DIRECT; @@ -166,6 +167,48 @@ ea->mode = MODE_REG_DIRECT; ea->base = SCRATCH1; break; + case MODE_AREG_INDEX_DISP8: + out = cycles(out, 6); + if (opts->aregs[inst->src.params.regs.pri] >= 0) { + out = mov_rr(out, opts->aregs[inst->src.params.regs.pri], SCRATCH1, SZ_D); + } else { + out = mov_rdisp8r(out, CONTEXT, reg_offset(&(inst->src)), SCRATCH1, SZ_D); + } + sec_reg = (inst->src.params.regs.sec >> 1) & 0x7; + if (inst->src.params.regs.sec & 1) { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + out = add_rr(out, opts->aregs[sec_reg], SCRATCH1, SZ_D); + } else { + out = add_rdisp8r(out, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + out = add_rr(out, opts->dregs[sec_reg], SCRATCH1, SZ_D); + } else { + out = add_rdisp8r(out, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } + } else { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + out = movsx_rr(out, opts->aregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + out = movsx_rdisp8r(out, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + out = movsx_rr(out, opts->dregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + out = movsx_rdisp8r(out, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } + out = add_rr(out, SCRATCH2, SCRATCH1, SZ_D); + } + if (inst->src.params.regs.displacement) { + out = add_ir(out, inst->src.params.regs.displacement, SCRATCH1, SZ_D); + } + break; case MODE_PC_DISPLACE: out = cycles(out, BUS); out = mov_ir(out, inst->src.params.regs.displacement + inst->address+2, SCRATCH1, SZ_D); @@ -184,6 +227,44 @@ ea->mode = MODE_REG_DIRECT; ea->base = SCRATCH1; break; + case MODE_PC_INDEX_DISP8: + out = cycles(out, 6); + out = mov_ir(out, inst->address, SCRATCH1, SZ_D); + sec_reg = (inst->src.params.regs.sec >> 1) & 0x7; + if (inst->src.params.regs.sec & 1) { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + out = add_rr(out, opts->aregs[sec_reg], SCRATCH1, SZ_D); + } else { + out = add_rdisp8r(out, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + out = add_rr(out, opts->dregs[sec_reg], SCRATCH1, SZ_D); + } else { + out = add_rdisp8r(out, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D); + } + } + } else { + if (inst->src.params.regs.sec & 0x10) { + if (opts->aregs[sec_reg] >= 0) { + out = movsx_rr(out, opts->aregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + out = movsx_rdisp8r(out, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } else { + if (opts->dregs[sec_reg] >= 0) { + out = movsx_rr(out, opts->dregs[sec_reg], SCRATCH2, SZ_W, SZ_D); + } else { + out = movsx_rdisp8r(out, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D); + } + } + out = add_rr(out, SCRATCH2, SCRATCH1, SZ_D); + } + if (inst->src.params.regs.displacement) { + out = add_ir(out, inst->src.params.regs.displacement, SCRATCH1, SZ_D); + } + break; case MODE_ABSOLUTE: case MODE_ABSOLUTE_SHORT: if (inst->src.addr_mode == MODE_ABSOLUTE) { @@ -1007,8 +1088,7 @@ dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->src.params.regs.pri, SCRATCH1, SZ_D); } dst = call(dst, (uint8_t *)m68k_native_addr); - //TODO: Finish me - printf("address mode %d not yet supported (jmp)\n", inst->src.addr_mode); + dst = jmp_r(dst, SCRATCH1); break; case MODE_PC_DISPLACE: dst = cycles(dst, 10); @@ -1045,14 +1125,20 @@ { case MODE_AREG_INDIRECT: dst = cycles(dst, BUS*2); + dst = mov_ir(dst, inst->address + 8, SCRATCH1, SZ_D); + dst = push_r(dst, SCRATCH1); + dst = sub_ir(dst, 4, opts->aregs[7], SZ_D); + dst = mov_rr(dst, opts->aregs[7], SCRATCH2, SZ_D); + dst = call(dst, (char *)m68k_write_long_highfirst); if (opts->aregs[inst->src.params.regs.pri] >= 0) { dst = mov_rr(dst, opts->aregs[inst->src.params.regs.pri], SCRATCH1, SZ_D); } else { dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->src.params.regs.pri, SCRATCH1, SZ_D); } dst = call(dst, (uint8_t *)m68k_native_addr); - //TODO: Finish me - printf("address mode %d not yet supported (jsr)\n", inst->src.addr_mode); + dst = call_r(dst, SCRATCH1); + //would add_ir(dst, 8, RSP, SZ_Q) be faster here? + dst = pop_r(dst, SCRATCH1); break; case MODE_PC_DISPLACE: //TODO: Add cycles in the right place relative to pushing the return address on the stack