# HG changeset patch # User Mike Pavone # Date 1367558920 25200 # Node ID 719b9fea2fe91091940306fb2c1498d74330f58d # Parent 9b04b57434b59fb3a650f2d014befcc3e7ba72af Implement LDD and LDDR diff -r 9b04b57434b5 -r 719b9fea2fe9 z80_to_x86.c --- a/z80_to_x86.c Thu May 02 22:26:47 2013 -0700 +++ b/z80_to_x86.c Thu May 02 22:28:40 2013 -0700 @@ -545,9 +545,45 @@ dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_PV), SZ_B); break; } - /*case Z80_LDD: - case Z80_LDDR: - case Z80_CPI: + case Z80_LDD: { + dst = zcycles(dst, 8); + dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH1, SZ_W); + dst = call(dst, (uint8_t *)z80_read_byte); + dst = mov_rr(dst, opts->regs[Z80_DE], SCRATCH2, SZ_W); + dst = call(dst, (uint8_t *)z80_read_byte); + dst = zcycles(dst, 2); + dst = sub_ir(dst, 1, opts->regs[Z80_DE], SZ_W); + dst = sub_ir(dst, 1, opts->regs[Z80_HL], SZ_W); + dst = sub_ir(dst, 1, opts->regs[Z80_BC], SZ_W); + //TODO: Implement half-carry + dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B); + dst = setcc_rdisp8(dst, CC_NZ, CONTEXT, zf_off(ZF_PV)); + break; + } + case Z80_LDDR: { + dst = zcycles(dst, 8); + dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH1, SZ_W); + dst = call(dst, (uint8_t *)z80_read_byte); + dst = mov_rr(dst, opts->regs[Z80_DE], SCRATCH2, SZ_W); + dst = call(dst, (uint8_t *)z80_read_byte); + dst = sub_ir(dst, 1, opts->regs[Z80_DE], SZ_W); + dst = sub_ir(dst, 1, opts->regs[Z80_HL], SZ_W); + + dst = sub_ir(dst, 1, opts->regs[Z80_BC], SZ_W); + uint8_t * cont = dst+1; + dst = jcc(dst, CC_Z, dst+2); + dst = zcycles(dst, 7); + //TODO: Figure out what the flag state should be here + //TODO: Figure out whether an interrupt can interrupt this + dst = jmp(dst, start); + *cont = dst - (cont + 1); + dst = zcycles(dst, 2); + //TODO: Implement half-carry + dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B); + dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_PV), SZ_B); + break; + } + /*case Z80_CPI: case Z80_CPIR: case Z80_CPD: case Z80_CPDR: