# HG changeset patch
# User Mike Pavone <pavone@retrodev.com>
# Date 1357534182 28800
# Node ID 7504200cac863dc99bf88102d84d8e99857f17c9
# Parent  a1c3ecb4823faafa4cf7bf27d0ee73537f975e6a
Fix order of SR and PC saved in an exception stack frame

diff -r a1c3ecb4823f -r 7504200cac86 m68k_to_x86.c
--- a/m68k_to_x86.c	Sun Jan 06 18:31:17 2013 -0800
+++ b/m68k_to_x86.c	Sun Jan 06 20:49:42 2013 -0800
@@ -3334,15 +3334,12 @@
 		break;
 	case M68K_RTE:
 		//TODO: Trap if not in system mode
-		dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D);
-		dst = call(dst, (uint8_t *)m68k_read_long_scratch1);
-		dst = push_r(dst, SCRATCH1);
-		dst = add_ir(dst, 4, opts->aregs[7], SZ_D);
+		//Read saved SR
 		dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D);
 		dst = call(dst, (uint8_t *)m68k_read_word_scratch1);
 		dst = add_ir(dst, 2, opts->aregs[7], SZ_D);
 		dst = call(dst, (uint8_t *)set_sr);
-		dst = pop_r(dst, SCRATCH1);
+		//Check if we've switched to user mode and swap stack pointers if needed
 		dst = bt_irdisp8(dst, 5, CONTEXT, offsetof(m68k_context, status), SZ_B);
 		end_off = dst+1;
 		dst = jcc(dst, CC_C, dst+2);
@@ -3350,20 +3347,26 @@
 		dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, opts->aregs[7], SZ_D);
 		dst = mov_rrdisp8(dst, SCRATCH2, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t) * 8, SZ_D);
 		*end_off = dst - (end_off+1);
+		//Read saved PC
+		dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D);
+		dst = call(dst, (uint8_t *)m68k_read_long_scratch1);
+		dst = add_ir(dst, 4, opts->aregs[7], SZ_D);
+		//Get native address, sync components, recalculate integer points and jump to returned address
 		dst = call(dst, (uint8_t *)m68k_native_addr_and_sync);
 		dst = jmp_r(dst, SCRATCH1);
 		break;
 	case M68K_RTR:
-		dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D);
-		dst = call(dst, (uint8_t *)m68k_read_long_scratch1);
-		dst = push_r(dst, SCRATCH1);
-		dst = add_ir(dst, 4, opts->aregs[7], SZ_D);
+		//Read saved CCR
 		dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D);
 		dst = call(dst, (uint8_t *)m68k_read_word_scratch1);
 		dst = add_ir(dst, 2, opts->aregs[7], SZ_D);
 		dst = call(dst, (uint8_t *)set_ccr);
-		dst = pop_r(dst, SCRATCH1);
-		dst = call(dst, (uint8_t *)m68k_native_addr_and_sync);
+		//Read saved PC
+		dst = mov_rr(dst, opts->aregs[7], SCRATCH1, SZ_D);
+		dst = call(dst, (uint8_t *)m68k_read_long_scratch1);
+		dst = add_ir(dst, 4, opts->aregs[7], SZ_D);
+		//Get native address and jump to it
+		dst = call(dst, (uint8_t *)m68k_native_addr);
 		dst = jmp_r(dst, SCRATCH1);
 		break;
 	/*case M68K_SBCD:
diff -r a1c3ecb4823f -r 7504200cac86 runtime.S
--- a/runtime.S	Sun Jan 06 18:31:17 2013 -0800
+++ b/runtime.S	Sun Jan 06 20:49:42 2013 -0800
@@ -17,8 +17,6 @@
 handle_cycle_limit_int:
 	cmp 88(%rsi), %eax
 	jb skip_int
-	push %rcx
-	/* call print_int_dbg */
 	/* swap USP and SSP if not already in supervisor mode */
 	bt $5, 5(%rsi)
 	jc already_supervisor
@@ -26,6 +24,10 @@
 	mov %r15d, 72(%rsi)
 	mov %edi, %r15d
 already_supervisor:
+	/* save PC */
+	sub $4, %r15d
+	mov %r15d, %edi
+	call m68k_write_long_lowfirst
 	/* save status register on stack */
 	sub $2, %r15d
 	mov %r15d, %edi
@@ -36,11 +38,6 @@
 	mov 92(%rsi), %cl
 	or $0x20, %cl
 	or %cl, 5(%rsi)
-	/* save PC */
-	sub $4, %r15d
-	mov %r15d, %edi
-	pop %rcx
-	call m68k_write_long_lowfirst
 	/* calculate interrupt vector address */
 	mov 92(%rsi), %ecx
 	shl $2, %ecx
@@ -68,6 +65,11 @@
 	mov %r15d, 72(%rsi)
 	mov %edi, %r15d
 already_supervisor_trap:
+	/* save PC */
+	sub $4, %r15d
+	mov %r15d, %edi
+	pop %rcx
+	call m68k_write_long_lowfirst
 	/* save status register on stack */
 	sub $2, %r15d
 	mov %r15d, %edi
@@ -78,11 +80,6 @@
 	mov 92(%rsi), %cl
 	or $0x20, %cl
 	or %cl, 5(%rsi)
-	/* save PC */
-	sub $4, %r15d
-	mov %r15d, %edi
-	pop %rcx
-	call m68k_write_long_lowfirst
 	/* calculate interrupt vector address */
 	pop %rcx
 	shl $2, %ecx
diff -r a1c3ecb4823f -r 7504200cac86 vdp.h
--- a/vdp.h	Sun Jan 06 18:31:17 2013 -0800
+++ b/vdp.h	Sun Jan 06 20:49:42 2013 -0800
@@ -9,7 +9,7 @@
 #define VSRAM_SIZE 40
 #define VRAM_SIZE (64*1024)
 #define LINEBUF_SIZE 320
-#define FRAMEBUF_ENTRIES 320*224
+#define FRAMEBUF_ENTRIES (320+27)*(240+27) //PAL active display + full border
 #define FRAMEBUF_SIZE (FRAMEBUF_ENTRIES*sizeof(uint16_t))
 #define MAX_DRAWS 40
 #define MAX_DRAWS_H32 32