# HG changeset patch # User Michael Pavone # Date 1588963230 25200 # Node ID 80920c21bb521e4d0687868a6be9f5d2fc4d9ce6 # Parent 41b9509ede387420212afc04e6b00ae9b9701301 Add an event log soft flush and call it twice per frame in between hard flushes to netplay latency when there are insufficient hardware updates to flush packets in the middle of a frame diff -r 41b9509ede38 -r 80920c21bb52 event_log.c --- a/event_log.c Fri May 08 00:26:34 2020 -0700 +++ b/event_log.c Fri May 08 11:40:30 2020 -0700 @@ -276,6 +276,7 @@ } } +uint8_t wrote_since_last_flush; void event_log(uint8_t type, uint32_t cycle, uint8_t size, uint8_t *payload) { if (!fully_active) { @@ -294,6 +295,7 @@ if (listen_sock) { if ((output_stream.next_out - compressed) > 1280 || !output_stream.avail_out) { flush_socket(); + wrote_since_last_flush = 1; } } else if (!output_stream.avail_out) { fwrite(compressed, 1, compressed_storage, event_file); @@ -467,9 +469,22 @@ output_stream.avail_out = compressed_storage; } else if (listen_sock) { flush_socket(); + wrote_since_last_flush = 0; } } +void event_soft_flush(uint32_t cycle) +{ + if (!fully_active || wrote_since_last_flush || event_file) { + return; + } + event_header(EVENT_FLUSH, cycle); + last = cycle; + + deflate_flush(0); + flush_socket(); +} + static void init_event_reader_common(event_reader *reader) { reader->last_cycle = 0; diff -r 41b9509ede38 -r 80920c21bb52 event_log.h --- a/event_log.h Fri May 08 00:26:34 2020 -0700 +++ b/event_log.h Fri May 08 11:40:30 2020 -0700 @@ -48,6 +48,7 @@ void event_vram_byte(uint32_t cycle, uint16_t address, uint8_t byte, uint8_t auto_inc); void event_state(uint32_t cycle, serialize_buffer *state); void event_flush(uint32_t cycle); +void event_soft_flush(uint32_t cycle); void init_event_reader(event_reader *reader, uint8_t *data, size_t size); void init_event_reader_tcp(event_reader *reader, char *address, char *port); diff -r 41b9509ede38 -r 80920c21bb52 genesis.c --- a/genesis.c Fri May 08 00:26:34 2020 -0700 +++ b/genesis.c Fri May 08 11:40:30 2020 -0700 @@ -348,9 +348,6 @@ //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2); } -//TODO: move this inside the system context -static uint32_t last_frame_num; - //My refresh emulation isn't currently good enough and causes more problems than it solves #define REFRESH_EMULATION #ifdef REFRESH_EMULATION @@ -387,9 +384,11 @@ context->should_return = 1; gen->reset_cycle = CYCLE_NEVER; } - if (v_context->frame != last_frame_num) { - //printf("reached frame end %d | MCLK Cycles: %d, Target: %d, VDP cycles: %d, vcounter: %d, hslot: %d\n", last_frame_num, mclks, gen->frame_end, v_context->cycles, v_context->vcounter, v_context->hslot); - last_frame_num = v_context->frame; + if (v_context->frame != gen->last_frame) { + //printf("reached frame end %d | MCLK Cycles: %d, Target: %d, VDP cycles: %d, vcounter: %d, hslot: %d\n", gen->last_frame, mclks, gen->frame_end, v_context->cycles, v_context->vcounter, v_context->hslot); + gen->last_frame = v_context->frame; + event_flush(mclks); + gen->last_flush_cycle = mclks; if(exit_after){ --exit_after; @@ -417,7 +416,11 @@ gen->reset_cycle -= deduction; } event_cycle_adjust(mclks, deduction); + gen->last_flush_cycle -= deduction; } + } else if (mclks - gen->last_flush_cycle > gen->soft_flush_cycles) { + event_soft_flush(mclks); + gen->last_flush_cycle = mclks; } gen->frame_end = vdp_cycles_to_frame_end(v_context); context->sync_cycle = gen->frame_end; @@ -1188,8 +1191,10 @@ if (region & HZ50) { gen->normal_clock = MCLKS_PAL; + gen->soft_flush_cycles = MCLKS_LINE * 262 / 3 + 2; } else { gen->normal_clock = MCLKS_NTSC; + gen->soft_flush_cycles = MCLKS_LINE * 313 / 3 + 2; } gen->master_clock = gen->normal_clock; } diff -r 41b9509ede38 -r 80920c21bb52 genesis.h --- a/genesis.h Fri May 08 00:26:34 2020 -0700 +++ b/genesis.h Fri May 08 11:40:30 2020 -0700 @@ -51,6 +51,9 @@ uint32_t int_latency_prev1; uint32_t int_latency_prev2; uint32_t reset_cycle; + uint32_t last_frame; + uint32_t last_flush_cycle; + uint32_t soft_flush_cycles; uint8_t bank_regs[8]; uint16_t z80_bank_reg; uint16_t tmss_lock[2]; diff -r 41b9509ede38 -r 80920c21bb52 vdp.c --- a/vdp.c Fri May 08 00:26:34 2020 -0700 +++ b/vdp.c Fri May 08 11:40:30 2020 -0700 @@ -2118,8 +2118,6 @@ context->pushed_frame = 1; context->fb = NULL; } - //TODO: Check whether this happens before or after the cycle increment - event_flush(context->cycles); vdp_update_per_frame_debug(context); context->h40_lines = 0; context->frame++;