# HG changeset patch # User Michael Pavone # Date 1432704150 25200 # Node ID 8972378e314fe1e53e8554d5490f039886767308 # Parent 043393b79e288de6af9daee217c955c77c379e23 Fix register to operator mapping for channel 3 special mode diff -r 043393b79e28 -r 8972378e314f ym2612.c --- a/ym2612.c Tue May 26 20:00:50 2015 -0700 +++ b/ym2612.c Tue May 26 22:22:30 2015 -0700 @@ -585,14 +585,16 @@ ym_channel * channel = context->channels + chan_num; uint32_t inc, detune; if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { - inc = context->ch3_supp[op-2*4].fnum; - if (!context->ch3_supp[op-2*4].block) { + //supplemental fnum registers are in a different order than normal slot paramters + int index = (op-2*4) ^ 2; + inc = context->ch3_supp[index].fnum; + if (!context->ch3_supp[index].block) { inc >>= 1; } else { - inc <<= (context->ch3_supp[op-2*4].block-1); + inc <<= (context->ch3_supp[index].block-1); } //detune - detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; + detune = detune_table[context->ch3_supp[index].keycode][operator->detune & 0x3]; } else { inc = channel->fnum; if (!channel->block) {