# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1663827399 25200
# Node ID 8e8db914120912641859cba97238e79f3271977a
# Parent  b2f788f08a31742484d299c687d11a439681bae5
Fix crash regression in m68k bit instruction implementation

diff -r b2f788f08a31 -r 8e8db9141209 m68k_core_x86.c
--- a/m68k_core_x86.c	Sat Sep 17 23:08:24 2022 -0700
+++ b/m68k_core_x86.c	Wed Sep 21 23:16:39 2022 -0700
@@ -1672,12 +1672,7 @@
 		}
 		if (inst->op != M68K_BTST && inst->extra.size != OPSIZE_BYTE) {
 			//bit operations that need to save the result have a 2 cycle penalty when operating on the upper word
-
-			if (src_op->mode == MODE_REG_DISPLACE8) {
-				cmp_irdisp(code, 16, src_op->base, src_op->disp, SZ_B);
-			} else {
-				cmp_ir(code, 16, src_op->base, SZ_B);
-			}
+			cmp_ir(code, 16, src_op->base, SZ_B);
 			code_ptr jmp_off = code->cur + 1;
 			jcc(code, CC_C, jmp_off + 1);
 			cycles(&opts->gen, 2);