# HG changeset patch # User Mike Pavone # Date 1356858916 28800 # Node ID 8fc8e46be691c66760802038802140bff47d0f4c # Parent 0bdbffa9fe90c8eb4574250c1c4da13e06e8f7c6 Fix bug that was causing DMA fills to lock up under certain circumstances diff -r 0bdbffa9fe90 -r 8fc8e46be691 vdp.c --- a/vdp.c Sun Dec 30 00:11:03 2012 -0800 +++ b/vdp.c Sun Dec 30 01:15:16 2012 -0800 @@ -191,7 +191,7 @@ //68K -> VDP case 0: case 0x40: - switch(context->cd & 0xF) + switch(context->dma_cd & 0xF) { case VRAM_WRITE: if (context->flags & FLAG_DMA_PROG) { @@ -215,7 +215,7 @@ break; //Fill case 0x80: - switch(context->cd & 0xF) + switch(context->dma_cd & 0xF) { case VRAM_WRITE: //Charles MacDonald's VDP doc says that the low byte gets written first @@ -243,7 +243,7 @@ //Copy case 0xC0: if (context->flags & FLAG_DMA_PROG) { - switch(context->cd & 0xF) + switch(context->dma_cd & 0xF) { case VRAM_WRITE: context->vdpmem[context->address] = context->dma_val; @@ -261,7 +261,7 @@ } else { //I assume, that DMA copy copies from the same RAM as the destination //but it's possible I'm mistaken - switch(context->cd & 0xF) + switch(context->dma_cd & 0xF) { case VRAM_WRITE: context->dma_val = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]]; @@ -297,6 +297,7 @@ if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) { context->flags |= FLAG_DMA_RUN; context->dma_val = start->value; + context->dma_cd = context->cd; } else { switch (context->cd & 0xF) { @@ -1034,6 +1035,7 @@ if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { //DMA copy or 68K -> VDP, transfer starts immediately context->flags |= FLAG_DMA_RUN; + context->dma_cd = context->cd; if (!(context->regs[REG_DMASRC_H] & 0x80)) { return 1; } diff -r 0bdbffa9fe90 -r 8fc8e46be691 vdp.h --- a/vdp.h Sun Dec 30 00:11:03 2012 -0800 +++ b/vdp.h Sun Dec 30 01:15:16 2012 -0800 @@ -110,6 +110,7 @@ uint16_t col_2; uint16_t dma_val; uint8_t v_offset; + uint8_t dma_cd; uint8_t *tmp_buf_a; uint8_t *tmp_buf_b; } vdp_context;