# HG changeset patch # User Michael Pavone # Date 1420162319 28800 # Node ID 98927f1b005b900217228d8bbfbdccb9d6a04e80 # Parent a18e3923481ef4f92c4576c4287d925a21575872 Fix some issues with 68K instruction retranslation diff -r a18e3923481e -r 98927f1b005b backend.c --- a/backend.c Thu Jan 01 14:36:55 2015 -0800 +++ b/backend.c Thu Jan 01 17:31:59 2015 -0800 @@ -53,7 +53,7 @@ void * get_native_pointer(uint32_t address, void ** mem_pointers, cpu_options * opts) { - memmap_chunk * memmap = opts->memmap; + memmap_chunk const * memmap = opts->memmap; address &= opts->address_mask; for (uint32_t chunk = 0; chunk < opts->memmap_chunks; chunk++) { diff -r a18e3923481e -r 98927f1b005b gen.h --- a/gen.h Thu Jan 01 14:36:55 2015 -0800 +++ b/gen.h Thu Jan 01 17:31:59 2015 -0800 @@ -17,6 +17,8 @@ code_ptr last; } code_info; +void check_alloc_code(code_info *code, uint32_t inst_size); + void init_code_info(code_info *code); void call(code_info *code, code_ptr fun); void jmp(code_info *code, code_ptr dest); diff -r a18e3923481e -r 98927f1b005b gen_x86.h --- a/gen_x86.h Thu Jan 01 14:36:55 2015 -0800 +++ b/gen_x86.h Thu Jan 01 17:31:59 2015 -0800 @@ -80,8 +80,6 @@ MODE_IMMED = 0xFF } x86_modes; -void check_alloc_code(code_info *code, uint32_t inst_size); - void rol_ir(code_info *code, uint8_t val, uint8_t dst, uint8_t size); void ror_ir(code_info *code, uint8_t val, uint8_t dst, uint8_t size); void rcl_ir(code_info *code, uint8_t val, uint8_t dst, uint8_t size); diff -r a18e3923481e -r 98927f1b005b m68k_core.c --- a/m68k_core.c Thu Jan 01 14:36:55 2015 -0800 +++ b/m68k_core.c Thu Jan 01 17:31:59 2015 -0800 @@ -761,6 +761,7 @@ do { if (opts->address_log) { fprintf(opts->address_log, "%X\n", address); + fflush(opts->address_log); } do { encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); @@ -813,18 +814,19 @@ if (orig_size != MAX_NATIVE_SIZE) { deferred_addr * orig_deferred = opts->gen.deferred; - //make sure the beginning of the code for an instruction is contiguous - check_code_prologue(code); + //make sure we have enough code space for the max size instruction + check_alloc_code(code, MAX_NATIVE_SIZE); code_ptr native_start = code->cur; translate_m68k(opts, &instbuf); code_ptr native_end = code->cur; - uint8_t is_terminal = m68k_is_terminal(&instbuf); + /*uint8_t is_terminal = m68k_is_terminal(&instbuf); if ((native_end - native_start) <= orig_size) { code_ptr native_next; if (!is_terminal) { native_next = get_native_address(context->native_code_map, orig + (after-inst)*2); } if (is_terminal || (native_next && ((native_next == orig_start + orig_size) || (orig_size - (native_end - native_start)) > 5))) { + printf("Using original location: %p\n", orig_code.cur); remove_deferred_until(&opts->gen.deferred, orig_deferred); code_info tmp; tmp.cur = code->cur; @@ -841,7 +843,7 @@ m68k_handle_deferred(context); return orig_start; } - } + }*/ map_native_address(context, instbuf.address, native_start, (after-inst)*2, MAX_NATIVE_SIZE); @@ -860,17 +862,14 @@ m68k_handle_deferred(context); return native_start; } else { - code_info tmp; - tmp.cur = code->cur; - tmp.last = code->last; - code->cur = orig_code.cur; - code->last = orig_code.last; + code_info tmp = *code; + *code = orig_code; translate_m68k(opts, &instbuf); + orig_code = *code; + *code = tmp; if (!m68k_is_terminal(&instbuf)) { - jmp(code, get_native_address_trans(context, orig + (after-inst)*2)); + jmp(&orig_code, get_native_address_trans(context, orig + (after-inst)*2)); } - code->cur = tmp.cur; - code->last = tmp.last; m68k_handle_deferred(context); return orig_start; } diff -r a18e3923481e -r 98927f1b005b m68k_core_x86.c --- a/m68k_core_x86.c Thu Jan 01 14:36:55 2015 -0800 +++ b/m68k_core_x86.c Thu Jan 01 17:31:59 2015 -0800 @@ -2185,7 +2185,7 @@ mov_ir(&native, address, opts->gen.scratch1, SZ_D); if (!bp_stub) { code_info *code = &opts->gen.code; - check_alloc_code(code, 5); + check_code_prologue(code); bp_stub = code->cur; call(&native, bp_stub);