# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1569088090 25200
# Node ID 9ab5184811eaa2817f792dca6cbf5b95d5f23953
# Parent  62e8a8833e3923498e305f401aebb75802117028
Implement interrupts in call dispatch mode in CPU DSL

diff -r 62e8a8833e39 -r 9ab5184811ea cpu_dsl.py
--- a/cpu_dsl.py	Tue Sep 17 21:04:17 2019 -0700
+++ b/cpu_dsl.py	Sat Sep 21 10:48:10 2019 -0700
@@ -1593,7 +1593,12 @@
 			pieces.append('\n\t{sync}(context, target_cycle);'.format(sync=self.sync_cycle))
 			pieces.append('\n\twhile (context->cycles < target_cycle)')
 			pieces.append('\n\t{')
-			#TODO: Handle interrupts in call dispatch mode
+			if self.interrupt in self.subroutines:
+				pieces.append('\n\t\tif (context->cycles >= context->sync_cycle) {')
+				self.meta = {}
+				self.temp = {}
+				self.subroutines[self.interrupt].inline(self, [], pieces, otype, None)
+				pieces.append('\n\t\t}')
 			self.meta = {}
 			self.temp = {}
 			self.subroutines[self.body].inline(self, [], pieces, otype, None)