# HG changeset patch # User Mike Pavone # Date 1368078590 25200 # Node ID 9adc1dce39bfbfafd514fdb5f3ba084f9a743fe8 # Parent 42e1a986f2d0cdc764b29af529ea67dc725641a4 Fix IX/IY register selection when the direction bit is set diff -r 42e1a986f2d0 -r 9adc1dce39bf z80_to_x86.c --- a/z80_to_x86.c Wed May 08 22:46:03 2013 -0700 +++ b/z80_to_x86.c Wed May 08 22:49:50 2013 -0700 @@ -187,7 +187,7 @@ break; case Z80_IX_DISPLACE: case Z80_IY_DISPLACE: - reg = opts->regs[inst->addr_mode == Z80_IX_DISPLACE ? Z80_IX : Z80_IY]; + reg = opts->regs[(inst->addr_mode & 0x1F) == Z80_IX_DISPLACE ? Z80_IX : Z80_IY]; dst = mov_rr(dst, reg, areg, SZ_W); dst = add_ir(dst, inst->ea_reg, areg, SZ_W); size = z80_size(inst); @@ -212,7 +212,7 @@ ea->mode = MODE_UNUSED; break; default: - fprintf(stderr, "Unrecognized Z80 addressing mode %d\n", inst->addr_mode); + fprintf(stderr, "Unrecognized Z80 addressing mode %d\n", inst->addr_mode & 0x1F); exit(1); } return dst;