# HG changeset patch # User Michael Pavone # Date 1548744542 28800 # Node ID 9c058ea77b7a1acbf121252d146f4c4e58946e9e # Parent 5bfed2eedc9d239ba97098f1aa184de087c21edc Implementation of carry/overflow flags for adc instructions in CPU DSL diff -r 5bfed2eedc9d -r 9c058ea77b7a cpu_dsl.py --- a/cpu_dsl.py Mon Jan 28 22:37:46 2019 -0800 +++ b/cpu_dsl.py Mon Jan 28 22:49:02 2019 -0800 @@ -420,10 +420,32 @@ else: return prog.resolveReg(carryStorage, None, (), False) -def _adcCImpl(prog, params, rawParams): - - return '\n\t{dst} = {a} + {b} + ({check} ? 1 : 0);'.format(dst = params[2], - a = params[0], b = params[1], check=_getCarryCheck(prog) +def _adcCImpl(prog, params, rawParams, flagUpdates): + needsCarry = needsOflow = needsHalf = False + if flagUpdates: + for flag in flagUpdates: + calc = prog.flags.flagCalc[flag] + if calc == 'carry': + needsCarry = True + elif calc == 'half-carry': + needsHalf = True + elif calc == 'overflow': + needsOflow = True + decl = '' + carryCheck = _getCarryCheck(prog) + if needsCarry or needsOflow or needsHalf: + size = prog.paramSize(rawParams[2]) + if needsCarry: + size *= 2 + decl,name = prog.getTemp(size) + dst = prog.carryFlowDst = name + prog.lastA = params[0] + prog.lastB = '({b} ^ ({check} ? 1 : 0))'.format(b = params[1], check = carryCheck) + prog.lastBFlow = prog.lastB + else: + dst = params[2] + return decl + '\n\t{dst} = {a} + {b} + ({check} ? 1 : 0);'.format(dst = dst, + a = params[0], b = params[1], check = carryCheck ) def _sbcCImpl(prog, params, rawParams):