# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1548739823 28800
# Node ID a16088324f3037c3aebbf811deb7bb3b81435b8d
# Parent  c2324849a5e51ff2cf6b9173ba6778e65ba6360d
Less broken flag calulcation for sub instructions in CPU DSL

diff -r c2324849a5e5 -r a16088324f30 cpu_dsl.py
--- a/cpu_dsl.py	Mon Jan 28 21:16:41 2019 -0800
+++ b/cpu_dsl.py	Mon Jan 28 21:30:23 2019 -0800
@@ -240,7 +240,8 @@
 				decl,name = prog.getTemp(size)
 				dst = prog.carryFlowDst = name
 				prog.lastA = a
-				prog.lastB = b
+				prog.lastB = '(-' + b + ')' if op == '-' else b
+				prog.lastWasSub = op == '-'
 			else:
 				dst = params[2]
 			return decl + '\n\t{dst} = {a} {op} {b};'.format(
@@ -312,7 +313,8 @@
 				resultBit = prog.paramSize(prog.lastDst)
 			elif calc == 'half':
 				resultBit = 4
-				myRes = '({a} ^ {b} ^ {res})'.format(a = prog.lastA, b = prog.lastB, res = lastDst)
+				fmt = '({a} ^ {b} ^ ~{res})' if prog.lastWasSub else '({a} ^ {b} ^ {res})'
+				myRes = fmt.format(a = prog.lastA, b = prog.lastB, res = lastDst)
 			elif calc == 'overflow':
 				resultBit = prog.paramSize(prog.lastDst) - 1
 				myRes = '((~({a} ^ {b})) & ({a} ^ {res}))'.format(a = prog.lastA, b = prog.lastB, res = lastDst)
@@ -989,6 +991,7 @@
 		self.carryFlowDst = None
 		self.lastA = None
 		self.lastB = None
+		self.lastWasSub = False
 		
 	def __str__(self):
 		pieces = []