# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1390889542 28800
# Node ID a3b48a57e8470b451b7e8ee93d3e2230606e106e
# Parent  b7b7a1cab44ace84d3c3320563a209f9e06d3189
Fix timing of certain ld and jp instructions in the Z80 core

diff -r b7b7a1cab44a -r a3b48a57e847 z80_to_x86.c
--- a/z80_to_x86.c	Mon Jan 06 22:54:05 2014 -0800
+++ b/z80_to_x86.c	Mon Jan 27 22:12:22 2014 -0800
@@ -346,6 +346,9 @@
 			if (inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) {
 				cycles += 4;
 			}
+			if (inst->reg == Z80_I || inst->ea_reg == Z80_I) {
+				cycles += 5;
+			}
 			break;
 		case Z80_IMMED:
 			cycles = size == SZ_B ? 7 : 10;
@@ -355,7 +358,7 @@
 			break;
 		case Z80_IX_DISPLACE:
 		case Z80_IY_DISPLACE:
-			cycles = 12;
+			cycles = 16;
 			break;
 		}
 		if ((inst->reg >= Z80_IXL && inst->reg <= Z80_IYH) || inst->reg == Z80_IX || inst->reg == Z80_IY) {
@@ -1312,7 +1315,7 @@
 	}
 	case Z80_JP: {
 		cycles = 4;
-		if (inst->addr_mode != Z80_REG) {
+		if (inst->addr_mode != Z80_REG_INDIRECT) {
 			cycles += 6;
 		} else if(inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) {
 			cycles += 4;