# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1647196566 25200
# Node ID b0dcf5c9f353c759b5f15039e464b6886ad15e5f
# Parent  1bf30397dd4574bb32d691ea910a9912e2b223cc
Fix some issues with PCM dma/CPU write conflicts

diff -r 1bf30397dd45 -r b0dcf5c9f353 rf5c164.c
--- a/rf5c164.c	Sat Mar 12 22:54:41 2022 -0800
+++ b/rf5c164.c	Sun Mar 13 11:36:06 2022 -0700
@@ -147,6 +147,8 @@
 		CHECK;
 	case 10:
 		//refresh?
+		//does refresh happen at the same rate when sounding disabled? warning in sega docs suggests maybe not
+		write_if_not_sounding(pcm);
 		CHECK;
 	case 11:
 		write_always(pcm);
diff -r 1bf30397dd45 -r b0dcf5c9f353 segacd.c
--- a/segacd.c	Sat Mar 12 22:54:41 2022 -0800
+++ b/segacd.c	Sun Mar 13 11:36:06 2022 -0700
@@ -365,6 +365,12 @@
 		//need to run CD drive because there may be a PCM DMA underway
 		cdd_run(cd, m68k->current_cycle);
 		rf5c164_run(&cd->pcm, m68k->current_cycle);
+		while ((cd->pcm.flags & 0x81) == 1) {
+			//not sounding, but pending write
+			//DMA write conflict presumably adds wait states
+			m68k->current_cycle += 4;
+			rf5c164_run(&cd->pcm, m68k->current_cycle);
+		}
 		rf5c164_write(&cd->pcm, address >> 1, value);
 	}
 	return vcontext;
@@ -889,6 +895,11 @@
 	case DST_PCM_RAM:
 		dma_addr &= (1 << 13) - 1;
 		rf5c164_run(&cd->pcm, cd->cdc.cycle);
+		while ((cd->pcm.flags & 0x81) == 1) {
+			//not sounding, but pending write
+			//DMA write conflict with CPU
+			rf5c164_run(&cd->pcm, cd->pcm.cycle + 4);
+		}
 		rf5c164_write(&cd->pcm, 0x1000 | (dma_addr >> 1), value);
 		dma_addr += 2;
 		cd->cdc_dst_low = dma_addr & 7;