# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1740209287 28800
# Node ID b58ca7af1e60da999f0006387c019a34f0c63241
# Parent  ba2aba23b48e8b4518480efa3f459f818521d868
Fix nbcd in old 68K core for non-register addressing modes

diff -r ba2aba23b48e -r b58ca7af1e60 m68k_core_x86.c
--- a/m68k_core_x86.c	Fri Feb 21 02:28:43 2025 -0800
+++ b/m68k_core_x86.c	Fri Feb 21 23:28:07 2025 -0800
@@ -1471,6 +1471,11 @@
 void translate_m68k_abcd_sbcd(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op)
 {
 	code_info *code = &opts->gen.code;
+	if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG && inst->dst.addr_mode != MODE_AREG_PREDEC) {
+		//destination is in memory so we need to preserve scratch2 for the write at the end
+		push_r(code, opts->gen.scratch2);
+	}
+
 	if (inst->op == M68K_NBCD) {
 		if (dst_op->base != opts->gen.scratch2) {
 			if (dst_op->mode == MODE_REG_DIRECT) {
@@ -1496,10 +1501,6 @@
 			}
 		}
 	}
-	if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG && inst->dst.addr_mode != MODE_AREG_PREDEC) {
-		//destination is in memory so we need to preserve scratch2 for the write at the end
-		push_r(code, opts->gen.scratch2);
-	}
 
 	//reg to reg takes 6 cycles, mem to mem is 4 cycles + all the operand fetch/writing (including 2 cycle predec penalty for first operand)
 	cycles(&opts->gen, inst->dst.addr_mode != MODE_REG ? BUS : BUS + 2);