# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1469809439 25200
# Node ID b86c3ce007d9bc57f3ec22ce7c55a7af2fa1f347
# Parent  366c28ac6c550905c724cded312dc6b3260f496d
Implemented undocumented flag bits for rotate instructions

diff -r 366c28ac6c55 -r b86c3ce007d9 z80_to_x86.c
--- a/z80_to_x86.c	Fri Jul 29 09:14:32 2016 -0700
+++ b/z80_to_x86.c	Fri Jul 29 09:23:59 2016 -0700
@@ -1455,8 +1455,11 @@
 		}
 		if (dst_op.mode == MODE_REG_DIRECT) {
 			rol_ir(code, 1, dst_op.base, SZ_B);
+			mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		} else {
 			rol_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B);
+			mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B);
+			mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		}
 		if (src_op.mode == MODE_REG_DIRECT) {
 			mov_rr(code, dst_op.base, src_op.base, SZ_B);
@@ -1502,8 +1505,11 @@
 		bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B);
 		if (dst_op.mode == MODE_REG_DIRECT) {
 			rcl_ir(code, 1, dst_op.base, SZ_B);
+			mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		} else {
 			rcl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B);
+			mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B);
+			mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		}
 		if (src_op.mode == MODE_REG_DIRECT) {
 			mov_rr(code, dst_op.base, src_op.base, SZ_B);
@@ -1548,8 +1554,11 @@
 		}
 		if (dst_op.mode == MODE_REG_DIRECT) {
 			ror_ir(code, 1, dst_op.base, SZ_B);
+			mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		} else {
 			ror_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B);
+			mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B);
+			mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		}
 		if (src_op.mode == MODE_REG_DIRECT) {
 			mov_rr(code, dst_op.base, src_op.base, SZ_B);
@@ -1595,8 +1604,11 @@
 		bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B);
 		if (dst_op.mode == MODE_REG_DIRECT) {
 			rcr_ir(code, 1, dst_op.base, SZ_B);
+			mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		} else {
 			rcr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B);
+			mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B);
+			mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		}
 		if (src_op.mode == MODE_REG_DIRECT) {
 			mov_rr(code, dst_op.base, src_op.base, SZ_B);