# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1585982837 25200
# Node ID b91c35bce3e9d2ee9b07d4735d08e6a16e06086e
# Parent  6ece1e2c7a15852a7f18701a4b57788a0bccc18d
Top bits of address register should be cleared on partial command word write. Fixes Mona in 344 bytes demo

diff -r 6ece1e2c7a15 -r b91c35bce3e9 vdp.c
--- a/vdp.c	Thu Apr 02 20:41:26 2020 -0700
+++ b/vdp.c	Fri Apr 03 23:47:17 2020 -0700
@@ -3732,7 +3732,9 @@
 		}
 	} else {
 		uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
-		context->address = (context->address &0xC000) | (value & 0x3FFF);
+		//contrary to what's in Charles MacDonald's doc, it seems top 2 address bits are cleared
+		//needed for the Mona in 344 Bytes demo
+		context->address = value & 0x3FFF;
 		context->cd = (context->cd & 0x3C) | (value >> 14);
 		if ((value & 0xC000) == 0x8000) {
 			//Register write