# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1488946632 28800
# Node ID be509813b2f2e19164ceb7d6a62d1ad48f785923
# Parent  c865ee5478bc872e0ee461ee40a7650a4555d928
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame

diff -r c865ee5478bc -r be509813b2f2 vdp.c
--- a/vdp.c	Tue Mar 07 00:01:16 2017 -0800
+++ b/vdp.c	Tue Mar 07 20:17:12 2017 -0800
@@ -1187,7 +1187,16 @@
 			return;
 		}
 		col -= 2;
-		dst = context->output + BORDER_LEFT + col * 8;
+		if (col) {
+			dst = context->output + BORDER_LEFT + col * 8;
+		} else {
+			dst = context->output;
+			uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
+			for (int i = 0; i < BORDER_LEFT; i++, dst++)
+			{
+				*dst = bg_color;
+			}
+		}
 		uint32_t color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
 		for (int i = 0; i < 16; i++)
 		{
@@ -1488,6 +1497,20 @@
 	} else if (context->vcounter == 0xDB) {
 		context->vcounter = 0x1D5;
 	}
+
+	if (context->vcounter > context->inactive_start) {
+		context->hint_counter = context->regs[REG_HINT];
+	} else if (context->hint_counter) {
+		context->hint_counter--;
+	} else {
+		context->flags2 |= FLAG2_HINT_PENDING;
+		context->pending_hint_start = context->cycles;
+		context->hint_counter = context->regs[REG_HINT];
+	}
+}
+
+static void advance_output_line(vdp_context *context)
+{
 	if (headless) {
 		if (context->vcounter == context->inactive_start) {
 			context->frame++;
@@ -1518,21 +1541,11 @@
 		{
 			context->output[i] = 0xFFFF00FF;
 		}
-#endif
+#endif	
 		if (output_line != INVALID_LINE && (context->regs[REG_MODE_4] & BIT_H40)) {
 			context->h40_lines++;
 		}
 	}
-
-	if (context->vcounter > context->inactive_start) {
-		context->hint_counter = context->regs[REG_HINT];
-	} else if (context->hint_counter) {
-		context->hint_counter--;
-	} else {
-		context->flags2 |= FLAG2_HINT_PENDING;
-		context->pending_hint_start = context->cycles;
-		context->hint_counter = context->regs[REG_HINT];
-	}
 }
 
 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; }
@@ -1626,12 +1639,20 @@
 
 #define SPRITE_RENDER_H40(slot) \
 	case slot:\
+		if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\
+			advance_output_line(context);\
+		}\
 		render_sprite_cells( context);\
 		scan_sprite_table(context->vcounter, context);\
 		CHECK_LIMIT_HSYNC(slot)
 
+//Note that the line advancement check will fail if BG_START_SLOT is > 6
+//as we're bumping up against the hcounter jump
 #define SPRITE_RENDER_H32(slot) \
 	case slot:\
+		if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
+			advance_output_line(context);\
+		}\
 		render_sprite_cells( context);\
 		scan_sprite_table(context->vcounter, context);\
 		if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
@@ -2277,6 +2298,7 @@
 		)) {
 			dst = context->output + (context->hslot - BG_START_SLOT) * 2;
 		} else if (context->hslot == bg_end_slot) {
+			advance_output_line(context);
 			dst = NULL;
 		}