# HG changeset patch
# User Mike Pavone <pavone@retrodev.com>
# Date 1368084655 25200
# Node ID bf440db6408643ed0baa49fe2c0090d72e3c0b47
# Parent  cb6a37861e42095dbc104c0e64c226afc21ce972
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.

diff -r cb6a37861e42 -r bf440db64086 z80_to_x86.c
--- a/z80_to_x86.c	Thu May 09 00:17:12 2013 -0700
+++ b/z80_to_x86.c	Thu May 09 00:30:55 2013 -0700
@@ -1016,6 +1016,10 @@
 			dst = translate_z80_reg(inst, &dst_op, dst, opts);
 		}
 		dst = shl_ir(dst, 1, dst_op.base, SZ_B);
+		dst  = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C));
+		if (inst->op == Z80_SLL) {
+			dst = or_ir(dst, 1, dst_op.base, SZ_B);
+		}
 		if (src_op.mode != MODE_UNUSED) {
 			dst = mov_rr(dst, dst_op.base, src_op.base, SZ_B);
 		}
@@ -1049,6 +1053,7 @@
 		if (src_op.mode != MODE_UNUSED) {
 			dst = mov_rr(dst, dst_op.base, src_op.base, SZ_B);
 		}
+		dst  = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C));
 		dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B);
 		//TODO: Implement half-carry flag
 		dst = cmp_ir(dst, 0, dst_op.base, SZ_B);
@@ -1079,6 +1084,7 @@
 		if (src_op.mode != MODE_UNUSED) {
 			dst = mov_rr(dst, dst_op.base, src_op.base, SZ_B);
 		}
+		dst  = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C));
 		dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B);
 		//TODO: Implement half-carry flag
 		dst = cmp_ir(dst, 0, dst_op.base, SZ_B);
@@ -1093,6 +1099,7 @@
 		} else {
 			dst = z80_save_reg(dst, inst, opts);
 		}
+		break;
 	case Z80_RLD:
 		dst = zcycles(dst, 8);
 		dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH1, SZ_W);