# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1492386004 25200
# Node ID bfdd450e7dea850f35516c87bbff4222ce26ef48
# Parent  32e95d6733a62cd02fe5cb42a2cdc795d7a39395
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support

diff -r 32e95d6733a6 -r bfdd450e7dea genesis.c
--- a/genesis.c	Sun Apr 16 16:38:56 2017 -0700
+++ b/genesis.c	Sun Apr 16 16:40:04 2017 -0700
@@ -340,7 +340,7 @@
 	} else if (vdp_port < 0x18) {
 		psg_write(gen->psg, value);
 	} else {
-		//TODO: Implement undocumented test register(s)
+		vdp_test_port_write(gen->vdp, value);
 	}
 	return context;
 }
diff -r 32e95d6733a6 -r bfdd450e7dea vdp.c
--- a/vdp.c	Sun Apr 16 16:38:56 2017 -0700
+++ b/vdp.c	Sun Apr 16 16:40:04 2017 -0700
@@ -757,9 +757,15 @@
 	}
 }
 
-void write_vram_byte(vdp_context *context, uint16_t address, uint8_t value)
+void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value)
 {
 	if (context->regs[REG_MODE_2] & BIT_MODE_5) {
+		if (context->regs[REG_MODE_2] & BIT_128K_VRAM) {
+			address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2);
+			address ^= 1;
+		} else {
+			address &= 0xFFFF;
+		}
 		if (!(address & 4)) {
 			uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9;
 			if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
@@ -789,7 +795,8 @@
 		switch (start->cd & 0xF)
 		{
 		case VRAM_WRITE:
-			if (start->partial) {
+			//TODO: Support actually having 128K VRAM as an option
+			if (start->partial || (context->regs[REG_MODE_2] & BIT_128K_VRAM)) {
 				//printf("VRAM Write: %X to %X at %d (line %d, slot %d)\n", start->value, start->address ^ 1, context->cycles, context->cycles/MCLKS_LINE, (context->cycles%MCLKS_LINE)/16);
 				write_vram_byte(context, start->address ^ 1, start->partial == 2 ? start->value >> 8 : start->value);
 			} else {
@@ -865,6 +872,7 @@
 				//Should this happen after the prefetch or after the read?
 				increment_address(context);
 			} else {
+				//TODO: 128K VRAM Mode
 				context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8;
 				context->flags2 |= FLAG2_READ_PENDING;
 			}
@@ -2456,7 +2464,7 @@
 		return -1;
 	}
 	if (context->flags & FLAG_PENDING) {
-		context->address = (context->address & 0x3FFF) | (value << 14);
+		context->address = (context->address & 0x3FFF) | (value << 14 & 0x1C000);
 		//It seems like the DMA enable bit doesn't so much enable DMA so much 
 		//as it enables changing CD5 from control port writes
 		uint8_t preserve = (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) ? 0x3 : 0x23;
@@ -2623,7 +2631,7 @@
 
 void vdp_test_port_write(vdp_context * context, uint16_t value)
 {
-	//TODO: implement test register
+	context->test_port = value;
 }
 
 uint16_t vdp_control_port_read(vdp_context * context)
@@ -2706,7 +2714,7 @@
 uint16_t vdp_test_port_read(vdp_context * context)
 {
 	//TODO: Find out what actually gets returned here
-	return 0xFFFF;
+	return context->test_port;
 }
 
 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction)
diff -r 32e95d6733a6 -r bfdd450e7dea vdp.h
--- a/vdp.h	Sun Apr 16 16:38:56 2017 -0700
+++ b/vdp.h	Sun Apr 16 16:40:04 2017 -0700
@@ -101,6 +101,7 @@
 #define BIT_DISP_DIS   0x01
 
 //Mode reg 2
+#define BIT_128K_VRAM  0x80
 #define BIT_DISP_EN    0x40
 #define BIT_VINT_EN    0x20
 #define BIT_DMA_ENABLE 0x10
@@ -135,7 +136,7 @@
 
 typedef struct {
 	uint32_t cycle;
-	uint16_t address;
+	uint32_t address;
 	uint16_t value;
 	uint8_t  cd;
 	uint8_t  partial;
@@ -145,7 +146,7 @@
 	fifo_entry  fifo[FIFO_SIZE];
 	int32_t     fifo_write;
 	int32_t     fifo_read;
-	uint16_t    address;
+	uint32_t    address;
 	uint8_t     cd;
 	uint8_t	    flags;
 	uint8_t     regs[VDP_REGS];
@@ -187,6 +188,7 @@
 	uint16_t    col_2;
 	uint16_t    hv_latch;
 	uint16_t    prefetch;
+	uint16_t    test_port;
 	uint8_t     fetch_tmp[2];
 	uint8_t     v_offset;
 	uint8_t     dma_cd;
@@ -233,6 +235,6 @@
 void latch_mode(vdp_context * context);
 uint32_t vdp_cycles_to_frame_end(vdp_context * context);
 void write_cram(vdp_context * context, uint16_t address, uint16_t value);
-void write_vram_byte(vdp_context *context, uint16_t address, uint8_t value);
+void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value);
 
 #endif //VDP_H_