# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1642578842 28800
# Node ID c4d066d798c401659f432a069d4a8790aebcc44c
# Parent  8ee7ecbf3f21e233afb43adf74c331f4a058fc5c
Fix prog RAM banking and Genesis to SCD cycle conversion. Arkagis Escape demo now works

diff -r 8ee7ecbf3f21 -r c4d066d798c4 segacd.c
--- a/segacd.c	Tue Jan 18 00:03:50 2022 -0800
+++ b/segacd.c	Tue Jan 18 23:54:02 2022 -0800
@@ -300,7 +300,6 @@
 				//switch to 2M mode
 				if (value & BIT_RET) {
 					//Main CPU will have word ram
-					genesis_context *gen = cd->genesis;
 					gen->m68k->mem_pointers[cd->memptr_start_index + 1] = cd->word_ram;
 					gen->m68k->mem_pointers[cd->memptr_start_index + 2] = cd->word_ram + 0x10000;
 					m68k->mem_pointers[0] = NULL;
@@ -425,7 +424,7 @@
 
 uint32_t gen_cycle_to_scd(uint32_t cycle, genesis_context *gen)
 {
-	return ((uint64_t)cycle) * ((uint64_t)gen->normal_clock) / ((uint64_t)SCD_MCLKS);
+	return ((uint64_t)cycle) * ((uint64_t)SCD_MCLKS) / ((uint64_t)gen->normal_clock);
 }
 
 void scd_adjust_cycle(segacd_context *cd, uint32_t deduction)
@@ -552,7 +551,7 @@
 		}
 		if (changed & MASK_PROG_BANK) {
 			uint32_t bank = cd->gate_array[GA_MEM_MODE] >> 6 & 0x3;
-			m68k->mem_pointers[cd->memptr_start_index] = cd->word_ram + bank * 0x10000;
+			m68k->mem_pointers[cd->memptr_start_index] = cd->prog_ram + bank * 0x10000;
 			m68k_invalidate_code_range(m68k, cd->base + 0x220000, cd->base + 0x240000);
 		}
 		break;