# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1469774266 25200
# Node ID d06c947a9a778c4ad69897d815d1230ffabbba30
# Parent  ef7ee9919a73fe023becba00daf6d4313c3d98d0
Implement undoumented flag bits for DAA, CPL, SCF and CCF

diff -r ef7ee9919a73 -r d06c947a9a77 z80_to_x86.c
--- a/z80_to_x86.c	Thu Jul 28 22:59:09 2016 -0700
+++ b/z80_to_x86.c	Thu Jul 28 23:37:46 2016 -0700
@@ -1299,6 +1299,7 @@
 		xor_rr(code, opts->regs[Z80_A], opts->gen.scratch1, SZ_B);
 		bt_ir(code, 4, opts->gen.scratch1, SZ_B);
 		setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H));
+		mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		break;
 	}
 	case Z80_CPL:
@@ -1306,6 +1307,7 @@
 		not_r(code, opts->regs[Z80_A], SZ_B);
 		mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_H), SZ_B);
 		mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B);
+		mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		break;
 	case Z80_NEG:
 		cycles(&opts->gen, num_cycles);
@@ -1327,12 +1329,14 @@
 		xor_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B);
 		mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B);
 		mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_H), SZ_B);
+		mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		break;
 	case Z80_SCF:
 		cycles(&opts->gen, num_cycles);
 		mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B);
 		mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B);
 		mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B);
+		mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
 		break;
 	case Z80_NOP:
 		cycles(&opts->gen, num_cycles);