# HG changeset patch # User Michael Pavone # Date 1483599718 28800 # Node ID ddbb61be611925be626f037310b0b3eb0d1a0d31 # Parent 681e8a13b261fd19b1febb92fa5f81d2fc18f2f9 Fix to pass a couple more tests in VDPTEST.sms diff -r 681e8a13b261 -r ddbb61be6119 vdp.c --- a/vdp.c Wed Jan 04 22:48:00 2017 -0800 +++ b/vdp.c Wed Jan 04 23:01:58 2017 -0800 @@ -2177,7 +2177,7 @@ } else { uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; context->address = (context->address &0xC000) | (value & 0x3FFF); - //Genesis Plus GX doesn't clear out the mode bits in Mode 4, but instead + //Genesis Plus GX doesn't clear out the upper mode bits in Mode 4, but instead //ignores the uppper mode bits when it comes to reads/writes //testing on hardware is needed to determine which is truly correct context->cd = (mode_5 ? context->cd &0x3C : 0) | (value >> 14); @@ -2388,10 +2388,7 @@ //Should this happen after the prefetch or after the read? increment_address(context); } - context->cd &= ~1; - if (context->cd == VRAM_READ) { - context->cd = VRAM_READ8; - } + context->cd = VRAM_READ8; return context->prefetch; }