# HG changeset patch
# User Mike Pavone <pavone@retrodev.com>
# Date 1379313204 25200
# Node ID e128e55710bd7cadf6f2cea3c11ae8895552bf36
# Parent  1358045c0bdd6f3d63ae20c77240a340c9debc8e
Remove read pending stuff, that had been added in an attempt to fix CRAM/VSRAM undefined bit results. Set number of bits actually saved in VSRAM to 11

diff -r 1358045c0bdd -r e128e55710bd vdp.c
--- a/vdp.c	Sun Sep 15 23:00:17 2013 -0700
+++ b/vdp.c	Sun Sep 15 23:33:24 2013 -0700
@@ -399,11 +399,11 @@
 void external_slot(vdp_context * context)
 {
 	fifo_entry * start = context->fifo + context->fifo_read;
-	if (context->flags2 & FLAG2_READ_PENDING) {
+	/*if (context->flags2 & FLAG2_READ_PENDING) {
 		context->flags2 &= ~FLAG2_READ_PENDING;
 		context->flags |= FLAG_UNUSED_SLOT;
 		return;
-	}
+	}*/
 	if (context->fifo_read >= 0 && start->cycle <= context->cycles) {
 		switch (start->cd & 0xF)
 		{
@@ -1574,7 +1574,7 @@
 }
 
 #define CRAM_BITS 0xEEE
-#define VSRAM_BITS 0x3FF
+#define VSRAM_BITS 0x7FF
 #define VSRAM_DIRTY_BITS 0xF800
 
 uint16_t vdp_data_port_read(vdp_context * context)
@@ -1585,7 +1585,7 @@
 	}
 	//Not sure if the FIFO should be drained before processing a read or not, but it would make sense
 	context->flags &= ~FLAG_UNUSED_SLOT;
-	context->flags2 |= FLAG2_READ_PENDING;
+	//context->flags2 |= FLAG2_READ_PENDING;
 	while (!(context->flags & FLAG_UNUSED_SLOT)) {
 		vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20));
 	}