# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1662365715 25200
# Node ID e22137f0aca411f8000a21583c4b03f161a222db
# Parent  d8b0244101c4c6969db909c4477e6fb0b72cbe08
Fix some 68K exception processing cycle times

diff -r d8b0244101c4 -r e22137f0aca4 m68k_core.c
--- a/m68k_core.c	Mon Sep 05 00:49:03 2022 -0700
+++ b/m68k_core.c	Mon Sep 05 01:15:15 2022 -0700
@@ -363,7 +363,6 @@
 static void translate_m68k_illegal(m68k_options *opts, m68kinst *inst)
 {
 	code_info *code = &opts->gen.code;
-	cycles(&opts->gen, BUS);
 	ldi_native(opts, VECTOR_ILLEGAL_INST, opts->gen.scratch2);
 	ldi_native(opts, inst->address, opts->gen.scratch1);
 	jmp(code, opts->trap);
diff -r d8b0244101c4 -r e22137f0aca4 m68k_core_x86.c
--- a/m68k_core_x86.c	Mon Sep 05 00:49:03 2022 -0700
+++ b/m68k_core_x86.c	Mon Sep 05 01:15:15 2022 -0700
@@ -1708,7 +1708,7 @@
 void translate_m68k_chk(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op)
 	{
 	code_info *code = &opts->gen.code;
-	cycles(&opts->gen, 6);
+	cycles(&opts->gen, 4);
 	if (dst_op->mode == MODE_REG_DIRECT) {
 		cmp_ir(code, 0, dst_op->base, inst->extra.size);
 	} else {
@@ -1762,7 +1762,7 @@
 	mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D);
 	jmp(code, opts->trap);
 	*passed = code->cur - (passed+1);
-	cycles(&opts->gen, 4);
+	cycles(&opts->gen, 6);
 }
 
 static uint32_t divu(uint32_t dividend, m68k_context *context, uint32_t divisor_shift)
@@ -3207,7 +3207,7 @@
 	shl_ir(code, 2, opts->gen.scratch1, SZ_D);
 	call(code, opts->read_32);
 	call(code, opts->native_addr_and_sync);
-	cycles(&opts->gen, 18);
+	cycles(&opts->gen, 14);
 	jmp_r(code, opts->gen.scratch1);
 
 	opts->retrans_stub = code->cur;