# HG changeset patch
# User Michael Pavone <pavone@retrodev.com>
# Date 1709801591 28800
# Node ID ea37200967c75b1a23b7740ab9a87253e605fe20
# Parent  2972a8e16ed2ad20bf6a2d285d2dd249e13db945
Implement lea and pea in new 68K core

diff -r 2972a8e16ed2 -r ea37200967c7 cpu_dsl.py
--- a/cpu_dsl.py	Tue Mar 05 23:23:06 2024 -0800
+++ b/cpu_dsl.py	Thu Mar 07 00:53:11 2024 -0800
@@ -54,6 +54,10 @@
 				if op == '=':
 					if len(parts) > 2 and parts[2] in binaryOps:
 						op = parts[2]
+						if op == '-':
+							tmp = parts[1]
+							parts[1] = parts[3]
+							parts[3] = tmp
 						parts[0] = binaryOps[op]
 						del parts[2]
 					elif len(parts) > 1 and parts[1][0] in unaryOps:
diff -r 2972a8e16ed2 -r ea37200967c7 m68k.cpu
--- a/m68k.cpu	Tue Mar 05 23:23:06 2024 -0800
+++ b/m68k.cpu	Thu Mar 07 00:53:11 2024 -0800
@@ -1737,6 +1737,87 @@
 	ror dregs.R 16 dregs.R
 	update_flags NZV0C0
 	m68k_prefetch
+	
+m68k_calc_ea
+	arg mode 16
+	arg reg 16
+	
+	switch mode
+	case 2
+		#address reg indirect
+		meta ea aregs.reg
+	case 5
+		#displacement
+		m68k_prefetch
+		sext 32 prefetch scratch1
+		scratch1 += aregs.reg
+		meta ea scratch1
+	case 6
+		#index
+		m68k_index_word
+		cycles 4
+		scratch1 += aregs.reg
+		meta ea scratch1
+	case 7
+		switch reg
+		case 0
+			#absolute short
+			m68k_prefetch
+			sext 32 prefetch scratch1
+		case 1
+			#absoltue long
+			m68k_prefetch
+			scratch2 = prefetch << 16
+			m68k_prefetch
+			scratch1 = scratch2 | prefetch
+		case 2
+			#pc displacement
+			m68k_prefetch
+			sext 32 prefetch scratch1
+			scratch1 += pc
+			scratch1 -= 2
+		case 3
+			#pc indexed
+			m68k_index_word
+			cycles 4
+			scratch1 += pc
+			scratch1 -= 2
+		end
+		meta ea scratch1
+	end
+
+0100100001MMMRRR pea
+	invalid M 0
+	invalid M 1
+	invalid M 3
+	invalid M 4
+	invalid M 7 R 4
+	invalid M 7 R 5
+	invalid M 7 R 6
+	invalid M 7 R 7
+	
+	m68k_calc_ea M R
+	scratch2 = a7 - 4
+	m68k_write32_lowfirst ea
+	a7 -= 4
+	
+	m68k_prefetch
+
+0100DDD111MMMRRR lea
+	invalid M 0
+	invalid M 1
+	invalid M 3
+	invalid M 4
+	invalid M 7 R 4
+	invalid M 7 R 5
+	invalid M 7 R 6
+	invalid M 7 R 7
+	
+	m68k_calc_ea M R
+	aregs.D = ea
+	
+	m68k_prefetch
+	
 
 0100111001110000 reset
 	if reset_handler