# HG changeset patch
# User Mike Pavone <pavone@retrodev.com>
# Date 1594783187 25200
# Node ID fc8fd89aeba9675dda200c69c2713a3352c26d42
# Parent  f77d36a975ffa37d45e65b0f5290e5c046a75e3b
Fix VGM delay calculation overflow when a YM-2612 write follows a PSG write in close succession

diff -r f77d36a975ff -r fc8fd89aeba9 vgm.c
--- a/vgm.c	Sun Jul 12 23:09:02 2020 -0700
+++ b/vgm.c	Tue Jul 14 20:19:47 2020 -0700
@@ -60,8 +60,15 @@
 	}
 }
 
+#include "util.h"
 static void add_wait(vgm_writer *writer, uint32_t cycle)
 {
+	if (cycle < writer->last_cycle) {
+		//This can happen when a YM-2612 write happens immediately after a PSG write
+		//due to the relatively low granularity of the PSG's internal clock
+		//given that VGM only has a granularity of 44.1 kHz ignoring this is harmless
+		return;
+	}
 	uint64_t last_sample = (uint64_t)writer->last_cycle * (uint64_t)44100;
 	last_sample /= (uint64_t)writer->master_clock;
 	uint64_t sample = (uint64_t)cycle * (uint64_t)44100;
@@ -73,10 +80,12 @@
 	wait_commands(writer, delta);
 }
 
+static uint8_t last_cmd;
 void vgm_sn76489_write(vgm_writer *writer, uint32_t cycle, uint8_t value)
 {
 	add_wait(writer, cycle);
 	uint8_t cmd[2] = {CMD_PSG, value};
+	last_cmd = CMD_PSG;
 	fwrite(cmd, 1, sizeof(cmd), writer->f);
 }
 
@@ -89,6 +98,7 @@
 {
 	add_wait(writer, cycle);
 	uint8_t cmd[3] = {CMD_YM2612_0, reg, value};
+	last_cmd = CMD_YM2612_0;
 	fwrite(cmd, 1, sizeof(cmd), writer->f);
 }
 
@@ -96,6 +106,7 @@
 {
 	add_wait(writer, cycle);
 	uint8_t cmd[3] = {CMD_YM2612_1, reg, value};
+	last_cmd = CMD_YM2612_1;
 	fwrite(cmd, 1, sizeof(cmd), writer->f);
 }