# HG changeset patch # User Michael Pavone # Date 1632292134 25200 # Node ID ed9a6de28158e094c9c26d68cbd07f269c300f5f # Parent 804954731e3f92fe36a71d9d741ac787a1f730f6 Always use "call" style interp generation from CPU DSL and default to NEW_CORE in mame_interp branch diff -r 804954731e3f -r ed9a6de28158 Makefile --- a/Makefile Thu Aug 05 23:48:41 2021 -0700 +++ b/Makefile Tue Sep 21 23:28:54 2021 -0700 @@ -184,7 +184,8 @@ TRANSOBJS=gen.o backend.o $(MEM) arena.o tern.o M68KOBJS=68kinst.o -ifdef NEW_CORE +NEW_CORE:=1 +ifeq ($(NEW_CORE),1) Z80OBJS=z80.o z80inst.o M68KOBJS+= m68k_core.o musashi/m68kops.o musashi/m68kcpu.o CFLAGS+= -DNEW_CORE @@ -344,12 +345,9 @@ vos_prog_info : vos_prog_info.o vos_program_module.o $(CC) -o vos_prog_info vos_prog_info.o vos_program_module.o - -m68k.c : m68k.cpu cpu_dsl.py - ./cpu_dsl.py -d call $< > $@ %.c : %.cpu cpu_dsl.py - ./cpu_dsl.py -d goto $< > $@ + ./cpu_dsl.py -d call $< > $@ %.db.c : %.db sed $< -e 's/"/\\"/g' -e 's/^\(.*\)$$/"\1\\n"/' -e'1s/^\(.*\)$$/const char $(shell echo $< | tr '.' '_')_data[] = \1/' -e '$$s/^\(.*\)$$/\1;/' > $@