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changeset 452:608815ab4ff2

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Merge
author Mike Pavone <pavone@retrodev.com>
date Sun, 01 Sep 2013 14:27:17 -0700
parents b7c3b2d22858 (current diff) 3758bcdae5de (diff)
children b491df8bdbc0
files blastem.c vdp.c
diffstat 2 files changed, 13 insertions(+), 8 deletions(-) [+]
line wrap: on
line diff
--- a/blastem.c	Fri Jul 26 19:55:04 2013 -0700
+++ b/blastem.c	Sun Sep 01 14:27:17 2013 -0700
@@ -221,7 +221,7 @@
 		if (gen->ym->write_cycle != CYCLE_NEVER) {
 			gen->ym->write_cycle = gen->ym->write_cycle >= mclks_per_frame/MCLKS_PER_68K ? gen->ym->write_cycle - mclks_per_frame/MCLKS_PER_68K : 0;
 		}
-		//printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks);
+		printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks);
 		vdp_run_context(v_context, mclks_per_frame);
 
 		if (!headless) {
@@ -296,6 +296,7 @@
 					vdp_run_dma_done(v_context, mclks_per_frame);
 					if (v_context->cycles >= mclks_per_frame) {
 						if (!headless) {
+							printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, v_context->cycles);
 							wait_render_frame(v_context, frame_limit);
 						}
 						vdp_adjust_cycles(v_context, mclks_per_frame);
@@ -313,7 +314,7 @@
 						}
 					}
 				}
-				context->current_cycle = v_context->cycles / MCLKS_PER_68K;
+				//context->current_cycle = v_context->cycles / MCLKS_PER_68K;
 			}
 		} else if(vdp_port < 8) {
 			blocked = vdp_control_port_write(v_context, value);
@@ -355,6 +356,7 @@
 			exit(1);
 		}
 		if (v_context->cycles != before_cycle) {
+			printf("68K paused for %d cycles at cycle %d\n", v_context->cycles / MCLKS_PER_68K - context->current_cycle, context->current_cycle);
 			context->current_cycle = v_context->cycles / MCLKS_PER_68K;
 		}
 	} else if (vdp_port < 0x18) {
--- a/vdp.c	Fri Jul 26 19:55:04 2013 -0700
+++ b/vdp.c	Sun Sep 01 14:27:17 2013 -0700
@@ -478,13 +478,15 @@
 			context->regs[REG_DMALEN_H] = dma_len >> 8;
 			context->regs[REG_DMALEN_L] = dma_len;
 			if (!dma_len) {
+				printf("DMA end at cycle %d\n", context->cycles);
 				context->flags &= ~FLAG_DMA_RUN;
 			}
 		}
 	} else {
 		fifo_entry * start = (context->fifo_end - FIFO_SIZE);
 		if (context->fifo_cur != start && start->cycle <= context->cycles) {
-			if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) {
+			if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START) && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80) {
+				printf("DMA fill started at %d\n", context->cycles);
 				context->flags |= FLAG_DMA_RUN;
 				context->dma_val = start->value;
 				context->address = start->address; //undo auto-increment
@@ -1458,7 +1460,7 @@
 
 int vdp_control_port_write(vdp_context * context, uint16_t value)
 {
-	//printf("control port write: %X\n", value);
+	printf("control port write: %X at %d\n", value, context->cycles);
 	if (context->flags & FLAG_DMA_RUN) {
 		return -1;
 	}
@@ -1466,13 +1468,14 @@
 		context->address = (context->address & 0x3FFF) | (value << 14);
 		context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C);
 		context->flags &= ~FLAG_PENDING;
-		//printf("New Address: %X, New CD: %X\n", context->address, context->cd);
+		printf("New Address: %X, New CD: %X\n", context->address, context->cd);
 		if (context->cd & 0x20 && (context->regs[REG_MODE_2] & BIT_DMA_ENABLE)) {
 			//
 			if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) {
 				//DMA copy or 68K -> VDP, transfer starts immediately
 				context->flags |= FLAG_DMA_RUN;
 				context->dma_cd = context->cd;
+				printf("DMA start at cycle %d\n", context->cycles);
 				if (!(context->regs[REG_DMASRC_H] & 0x80)) {
 					//printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]);
 					return 1;
@@ -1480,7 +1483,7 @@
 					//printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]);
 				}
 			} else {
-				//printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
+				printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
 			}
 		}
 	} else {
@@ -1488,7 +1491,7 @@
 			//Register write
 			uint8_t reg = (value >> 8) & 0x1F;
 			if (reg < VDP_REGS) {
-				//printf("register %d set to %X\n", reg, value & 0xFF);
+				printf("register %d set to %X\n", reg, value & 0xFF);
 				context->regs[reg] = value;
 				if (reg == REG_MODE_2) {
 					//printf("Display is now %s\n", (context->regs[REG_MODE_2] & DISPLAY_ENABLE) ? "enabled" : "disabled");
@@ -1511,7 +1514,7 @@
 
 int vdp_data_port_write(vdp_context * context, uint16_t value)
 {
-	//printf("data port write: %X\n", value);
+	printf("data port write: %X at %d\n", value, context->cycles);
 	if (context->flags & FLAG_DMA_RUN) {
 		return -1;
 	}