changeset 1374:8f404b1fa572

Go back to resetting the refresh counter after a DMA. Probably not quite correct as it is probably reset on VDP triggered refresh, but this is close enough for now given the general limitations with my refresh code. VDP FIFO Testing seems to be passing 100% reliably again (was occassionally failing still with the last commit)
author Michael Pavone <pavone@retrodev.com>
date Tue, 23 May 2017 23:47:40 -0700
parents 7cfc9d532e34
children b68732dcbf00
files genesis.c
diffstat 1 files changed, 7 insertions(+), 3 deletions(-) [+]
line wrap: on
line diff
--- a/genesis.c	Tue May 23 23:17:24 2017 -0700
+++ b/genesis.c	Tue May 23 23:47:40 2017 -0700
@@ -283,9 +283,9 @@
 	sync_components(context, 0);
 	genesis_context * gen = context->system;
 	vdp_context *v_context = gen->vdp;
+	uint32_t before_cycle = v_context->cycles;
 	if (vdp_port < 0x10) {
 		int blocked;
-		uint32_t before_cycle = v_context->cycles;
 		if (vdp_port < 4) {
 			while (vdp_data_port_write(v_context, value) < 0) {
 				while(v_context->flags & FLAG_DMA_RUN) {
@@ -361,8 +361,12 @@
 	last_sync_cycle -= 4;
 	//refresh may have happened while we were waiting on the VDP,
 	//so advance refresh_counter but don't add any delays
-	refresh_counter += (context->current_cycle - last_sync_cycle);
-	refresh_counter = refresh_counter % (MCLKS_PER_68K * REFRESH_INTERVAL);
+	if (vdp_port >= 4 && vdp_port < 8 && v_context->cycles != before_cycle) {
+		refresh_counter = 0;
+	} else {
+		refresh_counter += (context->current_cycle - last_sync_cycle);
+		refresh_counter = refresh_counter % (MCLKS_PER_68K * REFRESH_INTERVAL);
+	}
 	last_sync_cycle = context->current_cycle;
 #endif
 	return context;