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annotate src/cpu.h @ 11:04d8efe7a1f0

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Initial stab at video output and background color rendering. Fixed address decoding in address port write handler.
author Michael Pavone <pavone@retrodev.com>
date Sun, 27 Mar 2016 17:36:02 -0700
parents 5176efdda5ae
children fb14515266f4
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0
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1 #ifndef CPU_H_
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2 #define CPU_H_
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3
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4
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5 typedef struct cpu cpu;
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6
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7 typedef void (*port_write_fun) (cpu *context, uint8_t port, uint16_t value);
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8 typedef uint16_t (*port_read_fun) (cpu *context, uint8_t port);
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9
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10 typedef struct {
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11 port_write_fun write;
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12 port_read_fun read;
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13 } port_handler;
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14
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15
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16 #define MEM_READ 1
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17 #define MEM_WRITE 2
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18
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19 typedef struct {
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20 uint8_t *base;
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21 uint16_t start;
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22 uint16_t end;
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23 uint8_t flags;
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24 } memory_region;
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25
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26
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27 struct cpu {
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28 void *system;
0
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29 uint32_t cycles;
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30 uint32_t clock_inc;
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31 uint32_t num_mem_regions;
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32 uint16_t regs[16];
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33 uint16_t exception;
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34 uint16_t exception_pc;
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35 uint16_t exception_sr;
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36 uint16_t exception_ur;
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37 uint16_t vector_base;
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38
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39 uint16_t prefetch;
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40
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41 uint8_t state;
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42
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43 port_handler port_handlers[16];
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44 memory_region mem_regions[];
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45 };
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46
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47 cpu* alloc_cpu(uint32_t clock_divider, uint32_t num_regions, memory_region *regions);
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48 void run_cpu(cpu *context, uint32_t target_cycle);
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49 extern char * mnemonics[];
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50 extern char * mnemonics_single_src[];
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51 extern char * mnemonics_single_reg[];
0
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52
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53 enum {
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54 LDIM,
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55 LDIMH,
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56 LD8,
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57 LD16,
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58 STR8,
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59 STR16,
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60 ADD,
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61 ADC,
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62 AND,
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63 OR,
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64 XOR,
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65 LSL,
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66 LSR,
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67 ASR,
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68 BCC,
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69 SINGLE_SOURCE
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70 };
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71
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72 enum {
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73 MOVE,
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74 NEG,
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75 NOT,
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76 CMP,
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77 CALL,
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78 SWAP,
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79 IN,
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80 OUT,
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81 INI,
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82 OUTI,
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83 ADDI,
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84 ANDI,
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85 ORI,
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86 LSI,
2
6204c81e2933 Revert changes to handling of immediate versions of bitwise instructions. Replace asri with cmpi.
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87 CMPI,
0
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88 SINGLE_REG
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89 };
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90
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91 enum {
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92 RETI,
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93 TRAP,
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94 TRAPI,
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95 GETEPC,
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96 SETEPC,
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97 GETESR,
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98 SETESR,
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99 GETEUR,
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100 SETEUR,
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101 GETENUM,
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102 SETENUM
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103 };
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104
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105 enum {
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106 COND_ALWAYS,
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107 COND_NEVER,
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108 COND_ZERO,
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109 COND_NZERO,
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110 COND_NEG,
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111 COND_POS,
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112 COND_CARRY,
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113 COND_NCARRY,
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114 COND_GREATER,
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115 COND_LEQ
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116 };
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117
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118 #define REG_PC 14
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119 #define REG_SR 15
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120
0
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121 #endif //CPU_H_