Mercurial > repos > tabletprog
comparison modules/il.tp @ 354:a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
author | Michael Pavone <pavone@retrodev.com> |
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date | Wed, 15 Apr 2015 20:08:38 -0700 |
parents | f74ce841fd1e |
children | 3b023e5a0b42 |
comparison
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353:95bc24c729e6 | 354:a6cdcc1b1c02 |
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264 argument? <- { true } | 264 argument? <- { true } |
265 return? <- { false } | 265 return? <- { false } |
266 argnum <- { num } | 266 argnum <- { num } |
267 string <- { "a" . (string: num) } | 267 string <- { "a" . (string: num) } |
268 = <- :other { | 268 = <- :other { |
269 (not: (other isInteger?)) && (other register?) && (other argument?) && num = (other regnum) | 269 (not: (other isInteger?)) && (other register?) && (other argument?) && num = (other argnum) |
270 } | 270 } |
271 != <- :other { | 271 != <- :other { |
272 not: self = other | 272 not: self = other |
273 } | 273 } |
274 recordUsage:at:withSize <- :tracker :address :size { | 274 recordUsage:at:withSize <- :tracker :address :size { |
399 } | 399 } |
400 newcall <- call: newtarget withArgs: newargs | 400 newcall <- call: newtarget withArgs: newargs |
401 regSrc returnAll | 401 regSrc returnAll |
402 raddress <- address reverse | 402 raddress <- address reverse |
403 foreach: (usage liveArgsAt: raddress) :_ arg { | 403 foreach: (usage liveArgsAt: raddress) :_ arg { |
404 regSrc allocArg: (arg num) | 404 regSrc allocArg: (arg argnum) |
405 } | 405 } |
406 foreach: (usage liveRegsAt: raddress) :_ reg { | 406 foreach: (usage liveRegsAt: raddress) :_ reg { |
407 regSrc allocSpecific: (assignments get: reg) | 407 regSrc allocSpecific: (assignments get: reg) |
408 } | 408 } |
409 tosave <- regSrc needSaveForCall | 409 tosave <- regSrc needSaveForCall |
487 newelse append: (inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage) | 487 newelse append: (inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage) |
488 } | 488 } |
489 skipIf: _cond newskip else: newelse | 489 skipIf: _cond newskip else: newelse |
490 } | 490 } |
491 to2OpInst <- { | 491 to2OpInst <- { |
492 skipIf: _cond (to2Op: _toskip) (to2Op: _else) | 492 skipIf: _cond (to2Op: _toskip) else: (to2Op: _else) |
493 } | 493 } |
494 } | 494 } |
495 } | 495 } |
496 save <- :regs :_scope{ | 496 save <- :regs :_scope{ |
497 #{ | 497 #{ |
505 if: (_scope length) > 0 { | 505 if: (_scope length) > 0 { |
506 block <- "\n\t" . block . "\n" | 506 block <- "\n\t" . block . "\n" |
507 } | 507 } |
508 name . " " . (regs join: " ") . " {" . block . "}" | 508 name . " " . (regs join: " ") . " {" . block . "}" |
509 } | 509 } |
510 recordUsage:at <- :tracker :address { | |
511 foreach: regs :_ reg { | |
512 reg recordUsage: tracker at: address withSize: q | |
513 } | |
514 foreach: _scope :idx inst { | |
515 inst recordUsage: tracker at: idx | address | |
516 } | |
517 } | |
518 assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { | |
519 newregs <- regs map: :reg { | |
520 reg assign: assignments withSource: regSrc | |
521 } | |
522 idx <- 0 | |
523 newscope <- _scope map: :inst { | |
524 i <- inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage | |
525 idx <- idx + 1 | |
526 i | |
527 } | |
528 save: newregs newscope | |
529 } | |
510 to2OpInst <- { | 530 to2OpInst <- { |
511 save: regs (to2Op: _scope) | 531 save: regs (to2Op: _scope) |
512 } | 532 } |
513 } | 533 } |
514 } | 534 } |
521 out <- { _out } | 541 out <- { _out } |
522 name <- { _names get: _bool } | 542 name <- { _names get: _bool } |
523 numops <- { 0 } | 543 numops <- { 0 } |
524 string <- { | 544 string <- { |
525 name . " " . cond . " " . out | 545 name . " " . cond . " " . out |
546 } | |
547 recordUsage:at <- :tracker :address { | |
548 _out recordUsage: tracker at: address withSize: b | |
549 } | |
550 assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { | |
551 newout <- if: (_out register?) { | |
552 _out assign: assignments withSource: regSrc | |
553 } else: { _out } | |
554 bool: _cond newout | |
526 } | 555 } |
527 } | 556 } |
528 } | 557 } |
529 | 558 |
530 allocRegs:withSource <- :instarr :regSrc { | 559 allocRegs:withSource <- :instarr :regSrc { |
639 while: { curuses > 0 && (_assignments length) < (_regMap length) } do: { | 668 while: { curuses > 0 && (_assignments length) < (_regMap length) } do: { |
640 foreach: _regMap :reg usage { | 669 foreach: _regMap :reg usage { |
641 if: (usage useCount) = curuses { | 670 if: (usage useCount) = curuses { |
642 liveArgs <- liveFrom: _argMap (usage firstUsage) to: (usage lastUsage) | 671 liveArgs <- liveFrom: _argMap (usage firstUsage) to: (usage lastUsage) |
643 foreach: liveArgs :_ arg { | 672 foreach: liveArgs :_ arg { |
644 regSrc allocArg: (arg num) | 673 regSrc allocArg: (arg argnum) |
645 } | 674 } |
646 | 675 |
647 liveRegs <- liveFrom: _regMap (usage firstUsage) to: (usage lastUsage) | 676 liveRegs <- liveFrom: _regMap (usage firstUsage) to: (usage lastUsage) |
648 print: (string: reg) . " | Live: " . (liveRegs join: ", ") . ", Live Args: " . (liveArgs join: ", ") . "\n" | 677 print: (string: reg) . " | Live: " . (liveRegs join: ", ") . ", Live Args: " . (liveArgs join: ", ") . "\n" |
649 foreach: liveRegs :_ reg { | 678 foreach: liveRegs :_ reg { |
676 | 705 |
677 //used to convert IL to a format suitable for a 2-operand architecture | 706 //used to convert IL to a format suitable for a 2-operand architecture |
678 //should be run after register allocation (I think....) | 707 //should be run after register allocation (I think....) |
679 to2Op <- :instarr { | 708 to2Op <- :instarr { |
680 instarr fold: #[] with: :newarr inst { | 709 instarr fold: #[] with: :newarr inst { |
681 if: (inst numops) = 3 { | 710 if: (object does: inst understand?: "to2OpInst") { |
682 if: (inst inb) = (inst out) { | 711 newarr append: (inst to2OpInst) |
683 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) | 712 } else: { |
713 if: (inst numops) = 3 { | |
714 if: (inst inb) = (inst out) { | |
715 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) | |
716 } else: { | |
717 if: (inst commutative?) && (inst ina) = (inst out) { | |
718 newarr append: (op2: (inst opcode) in: (inst inb) out: (inst out) size: (inst size)) | |
719 } else: { | |
720 newarr append: (mov: (inst inb) (inst out) (inst size)) | |
721 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) | |
722 } | |
723 } | |
684 } else: { | 724 } else: { |
685 if: (inst commutative?) && (inst ina) = (inst out) { | 725 if: (inst numops) = 2 && (inst opcode) != _mov && (inst opcode) != _cmp { |
686 newarr append: (op2: (inst opcode) in: (inst inb) out: (inst out) size: (inst size)) | 726 if: (inst in) != (inst out) { |
687 } else: { | 727 newarr append: (mov: (inst in) (inst out) (inst size)) |
688 newarr append: (mov: (inst inb) (inst out) (inst size)) | 728 } |
689 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) | 729 newarr append: (op1: (inst opcode) arg: (inst out) size: (inst size)) |
690 } | |
691 } | |
692 } else: { | |
693 if: (inst numops) = 2 && (inst opcode) != _mov { | |
694 if: (inst in) != (inst out) { | |
695 newarr append: (mov: (inst in) (inst out) (inst size)) | |
696 } | |
697 newarr append: (op1: (inst opcode) val: (inst out) size: (inst size)) | |
698 } else: { | |
699 if: (inst opcode) = _skipif || (inst opcode) = _save { | |
700 newarr append: (inst to2OpInst) | |
701 } else: { | 730 } else: { |
702 newarr append: inst | 731 newarr append: inst |
703 } | 732 } |
704 } | 733 } |
705 } | 734 } |